diff options
author | Korey Sewell <ksewell@umich.edu> | 2006-06-15 22:01:28 -0400 |
---|---|---|
committer | Korey Sewell <ksewell@umich.edu> | 2006-06-15 22:01:28 -0400 |
commit | 51a5b826373e2c08ba173854a19597d59e0e3c90 (patch) | |
tree | 06c600520585ee0f02fd5772b35f3c9c4f7af05e /src/cpu/o3/fetch.hh | |
parent | f06d508af0ff78d7fc0e774d658cb6aedf330635 (diff) | |
download | gem5-51a5b826373e2c08ba173854a19597d59e0e3c90.tar.xz |
Initial changes to allowed DetailedCPU to work with other architectures (i.e. Sparc & MIPS)
Still need to add some code to fetch & commit stages
src/cpu/o3/commit.hh:
src/cpu/o3/cpu.cc:
src/cpu/o3/cpu.hh:
Add nextNPC read & set functions
src/cpu/o3/fetch.hh:
src/cpu/o3/fetch_impl.hh:
Add nextNPC
--HG--
extra : convert_revision : 120677547d54091411399156bd066ce5baf785f7
Diffstat (limited to 'src/cpu/o3/fetch.hh')
-rw-r--r-- | src/cpu/o3/fetch.hh | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/cpu/o3/fetch.hh b/src/cpu/o3/fetch.hh index 962d46437..c2d91a379 100644 --- a/src/cpu/o3/fetch.hh +++ b/src/cpu/o3/fetch.hh @@ -26,6 +26,7 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Authors: Kevin Lim + * Korey Sewell */ #ifndef __CPU_O3_FETCH_HH__ @@ -335,6 +336,15 @@ class DefaultFetch /** Per-thread next PC. */ Addr nextPC[Impl::MaxThreads]; +#if THE_ISA != ALPHA_ISA + /** Per-thread next Next PC. + * This is not a real register but is used for + * architectures that use a branch-delay slot. + * (such as MIPS or Sparc) + */ + Addr nextNPC[Impl::MaxThreads]; +#endif + /** Memory request used to access cache. */ RequestPtr memReq[Impl::MaxThreads]; |