summaryrefslogtreecommitdiff
path: root/src/cpu/o3/fetch.hh
diff options
context:
space:
mode:
authorKevin Lim <ktlim@umich.edu>2006-06-09 16:28:17 -0400
committerKevin Lim <ktlim@umich.edu>2006-06-09 16:28:17 -0400
commitc14c78fa3ed76d8d31d958724246d401d20396ea (patch)
treed71c7f395e4b860681af7665a30ba6b0b3d9b1c8 /src/cpu/o3/fetch.hh
parent4b732e43a61bd87db39a0316105a32dcde9b0fb8 (diff)
downloadgem5-c14c78fa3ed76d8d31d958724246d401d20396ea.tar.xz
Removing of old code and adding in new comments.
src/cpu/base_dyn_inst.cc: Clean up old functions, comments. src/cpu/o3/alpha_cpu_builder.cc: src/cpu/o3/alpha_params.hh: src/cpu/o3/cpu.hh: src/cpu/o3/fetch_impl.hh: src/cpu/o3/iew.hh: src/cpu/o3/iew_impl.hh: src/cpu/o3/lsq.hh: src/cpu/o3/lsq_impl.hh: src/cpu/o3/rename_impl.hh: src/cpu/ozone/lsq_unit.hh: src/cpu/ozone/lsq_unit_impl.hh: Remove old commented code. src/cpu/o3/fetch.hh: Remove old commented code, add in comments. src/cpu/o3/inst_queue_impl.hh: Move comment to better place. src/cpu/o3/lsq_unit.hh: Remove old commented code, add in new comments. src/cpu/o3/lsq_unit_impl.hh: Remove old commented code, rename variable. --HG-- extra : convert_revision : 8e79af9b4d3b3bdd0f55e4747c6ab64c9ad2f571
Diffstat (limited to 'src/cpu/o3/fetch.hh')
-rw-r--r--src/cpu/o3/fetch.hh21
1 files changed, 13 insertions, 8 deletions
diff --git a/src/cpu/o3/fetch.hh b/src/cpu/o3/fetch.hh
index 960d42178..76b32de68 100644
--- a/src/cpu/o3/fetch.hh
+++ b/src/cpu/o3/fetch.hh
@@ -69,29 +69,41 @@ class DefaultFetch
typedef TheISA::MachInst MachInst;
typedef TheISA::ExtMachInst ExtMachInst;
+ /** IcachePort class for DefaultFetch. Handles doing the
+ * communication with the cache/memory.
+ */
class IcachePort : public Port
{
protected:
+ /** Pointer to fetch. */
DefaultFetch<Impl> *fetch;
public:
+ /** Default constructor. */
IcachePort(DefaultFetch<Impl> *_fetch)
: Port(_fetch->name() + "-iport"), fetch(_fetch)
{ }
protected:
+ /** Atomic version of receive. Panics. */
virtual Tick recvAtomic(PacketPtr pkt);
+ /** Functional version of receive. Panics. */
virtual void recvFunctional(PacketPtr pkt);
+ /** Receives status change. Other than range changing, panics. */
virtual void recvStatusChange(Status status);
+ /** Returns the address ranges of this device. */
virtual void getDeviceAddressRanges(AddrRangeList &resp,
AddrRangeList &snoop)
{ resp.clear(); snoop.clear(); }
+ /** Timing version of receive. Handles setting fetch to the
+ * proper status to start fetching. */
virtual bool recvTiming(PacketPtr pkt);
+ /** Handles doing a retry of a failed fetch. */
virtual void recvRetry();
};
@@ -163,9 +175,6 @@ class DefaultFetch
/** Sets pointer to time buffer used to communicate to the next stage. */
void setFetchQueue(TimeBuffer<FetchStruct> *fq_ptr);
- /** Sets pointer to page table. */
-// void setPageTable(PageTable *pt_ptr);
-
/** Initialize stage. */
void initStage();
@@ -268,6 +277,7 @@ class DefaultFetch
}
private:
+ /** Handles retrying the fetch access. */
void recvRetry();
/** Returns the appropriate thread to fetch, given the fetch policy. */
@@ -406,11 +416,6 @@ class DefaultFetch
/** Records if fetch is switched out. */
bool switchedOut;
-#if !FULL_SYSTEM
- /** Page table pointer. */
-// PageTable *pTable;
-#endif
-
// @todo: Consider making these vectors and tracking on a per thread basis.
/** Stat for total number of cycles stalled due to an icache miss. */
Stats::Scalar<> icacheStallCycles;