summaryrefslogtreecommitdiff
path: root/src/cpu/o3/fetch_impl.hh
diff options
context:
space:
mode:
authorGabe Black <gblack@eecs.umich.edu>2007-03-13 16:13:21 +0000
committerGabe Black <gblack@eecs.umich.edu>2007-03-13 16:13:21 +0000
commitce18d900a17cdda2cc041b51c56e6c84fb155331 (patch)
treed7be0cac19e550c93fc207e749ea80e1cf9a639e /src/cpu/o3/fetch_impl.hh
parent8edc9d79cee3edd6d16a8254a0180aaa242974c7 (diff)
downloadgem5-ce18d900a17cdda2cc041b51c56e6c84fb155331.tar.xz
Replaced makeExtMI with predecode.
Removed the getOpcode function from StaticInst which only made sense for Alpha. Started implementing the x86 predecoder. --HG-- extra : convert_revision : a13ea257c8943ef25e9bc573024a99abacf4a70d
Diffstat (limited to 'src/cpu/o3/fetch_impl.hh')
-rw-r--r--src/cpu/o3/fetch_impl.hh10
1 files changed, 3 insertions, 7 deletions
diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index ac0149d18..89faeb1ab 100644
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -1117,13 +1117,9 @@ DefaultFetch<Impl>::fetch(bool &status_change)
inst = TheISA::gtoh(*reinterpret_cast<TheISA::MachInst *>
(&cacheData[tid][offset]));
-#if THE_ISA == ALPHA_ISA
- ext_inst = TheISA::makeExtMI(inst, fetch_PC);
-#elif THE_ISA == SPARC_ISA
- ext_inst = TheISA::makeExtMI(inst, cpu->thread[tid]->getTC());
-#elif THE_ISA == MIPS_ISA
- ext_inst = TheISA::makeExtMI(inst, cpu->thread[tid]->getTC());
-#endif
+ //unsigned int result =
+ TheISA::predecode(ext_inst, fetch_PC, inst,
+ cpu->thread[tid]->getTC());
// Create a new DynInst from the instruction fetched.
DynInstPtr instruction = new DynInst(ext_inst,