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| author | Kevin Lim <ktlim@umich.edu> | 2006-06-08 16:58:50 -0400 |
|---|---|---|
| committer | Kevin Lim <ktlim@umich.edu> | 2006-06-08 16:58:50 -0400 |
| commit | cf79dba504e2ed47ea82dae6cfc71662d1bc25a0 (patch) | |
| tree | 2e273cc1ae8045bcaa920cb75d73dc552820a0f9 /src/cpu/o3/fetch_impl.hh | |
| parent | bf6e176554253bed701338a8f481634e1cea8b48 (diff) | |
| download | gem5-cf79dba504e2ed47ea82dae6cfc71662d1bc25a0.tar.xz | |
Get O3 CPU mostly working in full system, and fix an FP bug that showed up.
It still does not yet handle retries.
src/cpu/base_dyn_inst.hh:
Get working in full-system mode and fix some FP bugs.
src/cpu/checker/cpu.cc:
src/cpu/checker/cpu.hh:
src/cpu/checker/thread_context.hh:
src/cpu/o3/alpha_cpu.hh:
src/cpu/o3/alpha_cpu_impl.hh:
src/cpu/o3/commit_impl.hh:
src/cpu/o3/cpu.cc:
src/cpu/o3/cpu.hh:
src/cpu/o3/fetch_impl.hh:
src/cpu/o3/thread_state.hh:
src/cpu/ozone/cpu.hh:
src/cpu/ozone/thread_state.hh:
src/cpu/thread_state.hh:
Get working in full system.
src/cpu/checker/o3_cpu_builder.cc:
Checker does not take a MemObject as a simobj parameter.
src/cpu/o3/alpha_dyn_inst.hh:
Fix up float regs.
src/cpu/o3/regfile.hh:
Fix up an fp error, print out more useful output messages.
--HG--
extra : convert_revision : d7cc152a051c697f18b7ee9e14050fbf3ffa5966
Diffstat (limited to 'src/cpu/o3/fetch_impl.hh')
| -rw-r--r-- | src/cpu/o3/fetch_impl.hh | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh index f3793db6d..152b69788 100644 --- a/src/cpu/o3/fetch_impl.hh +++ b/src/cpu/o3/fetch_impl.hh @@ -43,8 +43,6 @@ #include "arch/tlb.hh" #include "arch/vtophys.hh" #include "base/remote_gdb.hh" -#include "mem/functional/memory_control.hh" -#include "mem/functional/physical.hh" #include "sim/system.hh" #endif // FULL_SYSTEM @@ -531,7 +529,7 @@ DefaultFetch<Impl>::fetchCacheLine(Addr fetch_PC, Fault &ret_fault, unsigned tid // Translate the instruction request. //#if FULL_SYSTEM - fault = cpu->translateInstReq(mem_req); + fault = cpu->translateInstReq(mem_req, cpu->thread[tid]); //#else // fault = pTable->translate(memReq[tid]); //#endif @@ -542,7 +540,7 @@ DefaultFetch<Impl>::fetchCacheLine(Addr fetch_PC, Fault &ret_fault, unsigned tid // If translation was successful, attempt to read the first // instruction. if (fault == NoFault) { -#if FULL_SYSTEM +#if 0 if (cpu->system->memctrl->badaddr(memReq[tid]->paddr) || memReq[tid]->flags & UNCACHEABLE) { DPRINTF(Fetch, "Fetch: Bad address %#x (hopefully on a " |