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authorRekai Gonzalez-Alberquilla <rekai.gonzalezalberquilla@arm.com>2017-02-06 11:10:06 +0000
committerGiacomo Gabrielli <giacomo.gabrielli@arm.com>2018-11-16 10:39:03 +0000
commit0c50a0b4fe3956f9d2e08e75d47c9cbd79bf0268 (patch)
tree7679abe2343e0504c93eb73d09635d546a211455 /src/cpu/o3/fetch_impl.hh
parent338a173e822298bd22741342a7b24352450afdd1 (diff)
downloadgem5-0c50a0b4fe3956f9d2e08e75d47c9cbd79bf0268.tar.xz
cpu: Fix the usage of const DynInstPtr
Summary: Usage of const DynInstPtr& when possible and introduction of move operators to RefCountingPtr. In many places, scoped references to dynamic instructions do a copy of the DynInstPtr when a reference would do. This is detrimental to performance. On top of that, in case there is a need for reference tracking for debugging, the redundant copies make the process much more painful than it already is. Also, from the theoretical point of view, a function/method that defines a convenience name to access an instruction should not be considered an owner of the data, i.e., doing a copy and not a reference is not justified. On a related topic, C++11 introduces move semantics, and those are useful when, for example, there is a class modelling a HW structure that contains a list, and has a getHeadOfList function, to prevent doing a copy to an internal variable -> update pointer, remove from the list -> update pointer, return value making a copy to the assined variable -> update pointer, destroy the returned value -> update pointer. Change-Id: I3bb46c20ef23b6873b469fd22befb251ac44d2f6 Signed-off-by: Giacomo Gabrielli <giacomo.gabrielli@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/13105 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'src/cpu/o3/fetch_impl.hh')
-rw-r--r--src/cpu/o3/fetch_impl.hh4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index 2df7b84ee..5810c032f 100644
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -546,7 +546,7 @@ DefaultFetch<Impl>::deactivateThread(ThreadID tid)
template <class Impl>
bool
DefaultFetch<Impl>::lookupAndUpdateNextPC(
- DynInstPtr &inst, TheISA::PCState &nextPC)
+ const DynInstPtr &inst, TheISA::PCState &nextPC)
{
// Do branch prediction check here.
// A bit of a misnomer...next_PC is actually the current PC until
@@ -953,7 +953,7 @@ DefaultFetch<Impl>::tick()
while (available_insts != 0 && insts_to_decode < decodeWidth) {
ThreadID tid = *tid_itr;
if (!stalls[tid].decode && !fetchQueue[tid].empty()) {
- auto inst = fetchQueue[tid].front();
+ const auto& inst = fetchQueue[tid].front();
toDecode->insts[toDecode->size++] = inst;
DPRINTF(Fetch, "[tid:%i][sn:%i]: Sending instruction to decode from "
"fetch queue. Fetch queue size: %i.\n",