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authorKevin Lim <ktlim@umich.edu>2007-04-04 15:38:59 -0400
committerKevin Lim <ktlim@umich.edu>2007-04-04 15:38:59 -0400
commit6ff6621f20eb6513e12c769f601dba0b47b47697 (patch)
tree4a0da2fd882ae94d15361577807ede7111cd4626 /src/cpu/o3/fetch_impl.hh
parent9e1f3bc11a0f8cdb3bbb1ce12d4cd77d4c2c96c3 (diff)
downloadgem5-6ff6621f20eb6513e12c769f601dba0b47b47697.tar.xz
Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU functions.
src/cpu/o3/alpha/cpu_impl.hh: Pass ISA-specific O3 CPU to FullO3CPU as a constructor parameter instead of using setCPU functions. --HG-- extra : convert_revision : 74f4b1f5fb6f95a56081f367cce7ff44acb5688a
Diffstat (limited to 'src/cpu/o3/fetch_impl.hh')
-rw-r--r--src/cpu/o3/fetch_impl.hh49
1 files changed, 21 insertions, 28 deletions
diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index 85885906d..e16f97558 100644
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -110,8 +110,9 @@ DefaultFetch<Impl>::IcachePort::recvRetry()
}
template<class Impl>
-DefaultFetch<Impl>::DefaultFetch(Params *params)
- : branchPred(params),
+DefaultFetch<Impl>::DefaultFetch(O3CPU *_cpu, Params *params)
+ : cpu(_cpu),
+ branchPred(params),
predecoder(NULL),
decodeToFetchDelay(params->decodeToFetchDelay),
renameToFetchDelay(params->renameToFetchDelay),
@@ -163,6 +164,17 @@ DefaultFetch<Impl>::DefaultFetch(Params *params)
// Get the size of an instruction.
instSize = sizeof(TheISA::MachInst);
+
+ // Name is finally available, so create the port.
+ icachePort = new IcachePort(this);
+
+ icachePort->snoopRangeSent = false;
+
+#if USE_CHECKER
+ if (cpu->checker) {
+ cpu->checker->setIcachePort(icachePort);
+ }
+#endif
}
template <class Impl>
@@ -264,32 +276,6 @@ DefaultFetch<Impl>::regStats()
template<class Impl>
void
-DefaultFetch<Impl>::setCPU(O3CPU *cpu_ptr)
-{
- cpu = cpu_ptr;
- DPRINTF(Fetch, "Setting the CPU pointer.\n");
-
- // Name is finally available, so create the port.
- icachePort = new IcachePort(this);
-
- icachePort->snoopRangeSent = false;
-
-#if USE_CHECKER
- if (cpu->checker) {
- cpu->checker->setIcachePort(icachePort);
- }
-#endif
-
- // Schedule fetch to get the correct PC from the CPU
- // scheduleFetchStartupEvent(1);
-
- // Fetch needs to start fetching instructions at the very beginning,
- // so it must start up in active state.
- switchToActive();
-}
-
-template<class Impl>
-void
DefaultFetch<Impl>::setTimeBuffer(TimeBuffer<TimeStruct> *time_buffer)
{
timeBuffer = time_buffer;
@@ -342,6 +328,13 @@ DefaultFetch<Impl>::initStage()
stalls[tid].iew = false;
stalls[tid].commit = false;
}
+
+ // Schedule fetch to get the correct PC from the CPU
+ // scheduleFetchStartupEvent(1);
+
+ // Fetch needs to start fetching instructions at the very beginning,
+ // so it must start up in active state.
+ switchToActive();
}
template<class Impl>