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| author | Ali Saidi <Ali.Saidi@ARM.com> | 2011-03-17 19:20:19 -0500 |
|---|---|---|
| committer | Ali Saidi <Ali.Saidi@ARM.com> | 2011-03-17 19:20:19 -0500 |
| commit | 30143baf7e35a73acaff1d02cf71278248a86515 (patch) | |
| tree | 9320d8bd38fadd1e77a9329175cff2b938ee865e /src/cpu/o3/fetch_impl.hh | |
| parent | db350536555d7509b703b0707141e3f677645df0 (diff) | |
| download | gem5-30143baf7e35a73acaff1d02cf71278248a86515.tar.xz | |
O3: Cleanup the commitInfo comm struct.
Get rid of unused members and use base types rather than derrived values
where possible to limit amount of state.
Diffstat (limited to 'src/cpu/o3/fetch_impl.hh')
| -rw-r--r-- | src/cpu/o3/fetch_impl.hh | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh index 3092bd937..5f9be039f 100644 --- a/src/cpu/o3/fetch_impl.hh +++ b/src/cpu/o3/fetch_impl.hh @@ -934,15 +934,12 @@ DefaultFetch<Impl>::checkSignalsAndUpdate(ThreadID tid) // In any case, squash. squash(fromCommit->commitInfo[tid].pc, fromCommit->commitInfo[tid].doneSeqNum, - tid); + fromCommit->commitInfo[tid].squashInst, tid); // If it was a branch mispredict on a control instruction, update the // branch predictor with that instruction, otherwise just kill the // invalid state we generated in after sequence number - assert(!fromCommit->commitInfo[tid].branchMispredict || - fromCommit->commitInfo[tid].mispredictInst); - - if (fromCommit->commitInfo[tid].branchMispredict && + if (fromCommit->commitInfo[tid].mispredictInst && fromCommit->commitInfo[tid].mispredictInst->isControl()) { branchPred.squash(fromCommit->commitInfo[tid].doneSeqNum, fromCommit->commitInfo[tid].pc, |