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authorGabe Black <gblack@eecs.umich.edu>2007-04-03 22:53:26 +0000
committerGabe Black <gblack@eecs.umich.edu>2007-04-03 22:53:26 +0000
commit10fe8b05dbf38acff65d95a696cad95a45bf2e16 (patch)
tree3a1752f2241fccbc2828df8545f204bb9a5bccc1 /src/cpu/o3/free_list.hh
parent30f101881faad95e4a51fcb7bd7f564d660faae4 (diff)
downloadgem5-10fe8b05dbf38acff65d95a696cad95a45bf2e16.tar.xz
Made the "data" field of store queue entries into a character array. It's sized to match an IntReg which was what it used to be, but we might want to make it something architecture independent. All data is now endian converted before entering the store queue entries which simplifies store to load forwarding in "trans endian" simulations, and makes twin memory ops work.
src/cpu/o3/lsq_unit.hh: src/cpu/o3/lsq_unit_impl.hh: fixed twin memory operations. --HG-- extra : convert_revision : 8fb97f98e285cd22413e06e146fa82392ac2a590
Diffstat (limited to 'src/cpu/o3/free_list.hh')
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