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authorGabe Black <gblack@eecs.umich.edu>2006-10-02 14:32:02 -0400
committerGabe Black <gblack@eecs.umich.edu>2006-10-02 14:32:02 -0400
commite8ced44aead3b1a11ac7747b8d38ce5dba6c09d1 (patch)
tree2453c596489fbe786e6da2e21e0b5791bcbeaf88 /src/cpu/o3/iew.hh
parente62b734b23d03c50fcd31d833f417207e4520d29 (diff)
parentf2acc3a4a303e4cc054eef62621499ebcbf8599b (diff)
downloadgem5-e8ced44aead3b1a11ac7747b8d38ce5dba6c09d1.tar.xz
Merge zizzer.eecs.umich.edu:/bk/newmem
into zeep.eecs.umich.edu:/home/gblack/m5/newmem src/cpu/ozone/cpu_impl.hh: Hand merged --HG-- extra : convert_revision : f8a5b0205bcb78c8f5e109f456fe7bca80a7abac
Diffstat (limited to 'src/cpu/o3/iew.hh')
-rw-r--r--src/cpu/o3/iew.hh8
1 files changed, 7 insertions, 1 deletions
diff --git a/src/cpu/o3/iew.hh b/src/cpu/o3/iew.hh
index 76fa008ee..a400c9fa8 100644
--- a/src/cpu/o3/iew.hh
+++ b/src/cpu/o3/iew.hh
@@ -216,6 +216,7 @@ class DefaultIEW
if (++wbOutstanding == wbMax)
ableToIssue = false;
DPRINTF(IEW, "wbOutstanding: %i\n", wbOutstanding);
+ assert(wbOutstanding <= wbMax);
#ifdef DEBUG
wbList.insert(sn);
#endif
@@ -226,6 +227,7 @@ class DefaultIEW
if (wbOutstanding-- == wbMax)
ableToIssue = true;
DPRINTF(IEW, "wbOutstanding: %i\n", wbOutstanding);
+ assert(wbOutstanding >= 0);
#ifdef DEBUG
assert(wbList.find(sn) != wbList.end());
wbList.erase(sn);
@@ -450,7 +452,9 @@ class DefaultIEW
unsigned wbCycle;
/** Number of instructions in flight that will writeback. */
- unsigned wbOutstanding;
+
+ /** Number of instructions in flight that will writeback. */
+ int wbOutstanding;
/** Writeback width. */
unsigned wbWidth;
@@ -507,6 +511,8 @@ class DefaultIEW
Stats::Scalar<> iewExecutedInsts;
/** Stat for total number of executed load instructions. */
Stats::Vector<> iewExecLoadInsts;
+ /** Stat for total number of executed store instructions. */
+// Stats::Scalar<> iewExecStoreInsts;
/** Stat for total number of squashed instructions skipped at execute. */
Stats::Scalar<> iewExecSquashedInsts;
/** Number of executed software prefetches. */