diff options
author | Rekai Gonzalez-Alberquilla <rekai.gonzalezalberquilla@arm.com> | 2017-02-06 11:10:06 +0000 |
---|---|---|
committer | Giacomo Gabrielli <giacomo.gabrielli@arm.com> | 2018-11-16 10:39:03 +0000 |
commit | 0c50a0b4fe3956f9d2e08e75d47c9cbd79bf0268 (patch) | |
tree | 7679abe2343e0504c93eb73d09635d546a211455 /src/cpu/o3/iew.hh | |
parent | 338a173e822298bd22741342a7b24352450afdd1 (diff) | |
download | gem5-0c50a0b4fe3956f9d2e08e75d47c9cbd79bf0268.tar.xz |
cpu: Fix the usage of const DynInstPtr
Summary: Usage of const DynInstPtr& when possible and introduction of
move operators to RefCountingPtr.
In many places, scoped references to dynamic instructions do a copy of
the DynInstPtr when a reference would do. This is detrimental to
performance. On top of that, in case there is a need for reference
tracking for debugging, the redundant copies make the process much more
painful than it already is.
Also, from the theoretical point of view, a function/method that
defines a convenience name to access an instruction should not be
considered an owner of the data, i.e., doing a copy and not a reference
is not justified.
On a related topic, C++11 introduces move semantics, and those are
useful when, for example, there is a class modelling a HW structure that
contains a list, and has a getHeadOfList function, to prevent doing a
copy to an internal variable -> update pointer, remove from the list ->
update pointer, return value making a copy to the assined variable ->
update pointer, destroy the returned value -> update pointer.
Change-Id: I3bb46c20ef23b6873b469fd22befb251ac44d2f6
Signed-off-by: Giacomo Gabrielli <giacomo.gabrielli@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/13105
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'src/cpu/o3/iew.hh')
-rw-r--r-- | src/cpu/o3/iew.hh | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/src/cpu/o3/iew.hh b/src/cpu/o3/iew.hh index de8834005..b15521f5d 100644 --- a/src/cpu/o3/iew.hh +++ b/src/cpu/o3/iew.hh @@ -175,24 +175,24 @@ class DefaultIEW void squash(ThreadID tid); /** Wakes all dependents of a completed instruction. */ - void wakeDependents(DynInstPtr &inst); + void wakeDependents(const DynInstPtr &inst); /** Tells memory dependence unit that a memory instruction needs to be * rescheduled. It will re-execute once replayMemInst() is called. */ - void rescheduleMemInst(DynInstPtr &inst); + void rescheduleMemInst(const DynInstPtr &inst); /** Re-executes all rescheduled memory instructions. */ - void replayMemInst(DynInstPtr &inst); + void replayMemInst(const DynInstPtr &inst); /** Moves memory instruction onto the list of cache blocked instructions */ - void blockMemInst(DynInstPtr &inst); + void blockMemInst(const DynInstPtr &inst); /** Notifies that the cache has become unblocked */ void cacheUnblocked(); /** Sends an instruction to commit through the time buffer. */ - void instToCommit(DynInstPtr &inst); + void instToCommit(const DynInstPtr &inst); /** Inserts unused instructions of a thread into the skid buffer. */ void skidInsert(ThreadID tid); @@ -230,18 +230,18 @@ class DefaultIEW bool hasStoresToWB(ThreadID tid) { return ldstQueue.hasStoresToWB(tid); } /** Check misprediction */ - void checkMisprediction(DynInstPtr &inst); + void checkMisprediction(const DynInstPtr &inst); private: /** Sends commit proper information for a squash due to a branch * mispredict. */ - void squashDueToBranch(DynInstPtr &inst, ThreadID tid); + void squashDueToBranch(const DynInstPtr &inst, ThreadID tid); /** Sends commit proper information for a squash due to a memory order * violation. */ - void squashDueToMemOrder(DynInstPtr &inst, ThreadID tid); + void squashDueToMemOrder(const DynInstPtr &inst, ThreadID tid); /** Sets Dispatch to blocked, and signals back to other stages to block. */ void block(ThreadID tid); @@ -295,7 +295,7 @@ class DefaultIEW private: /** Updates execution stats based on the instruction. */ - void updateExeInstStats(DynInstPtr &inst); + void updateExeInstStats(const DynInstPtr &inst); /** Pointer to main time buffer used for backwards communication. */ TimeBuffer<TimeStruct> *timeBuffer; |