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| author | Steve Reinhardt <stever@eecs.umich.edu> | 2007-06-22 16:13:53 -0700 |
|---|---|---|
| committer | Steve Reinhardt <stever@eecs.umich.edu> | 2007-06-22 16:13:53 -0700 |
| commit | ed1db23b414a372a012d406d5a684775f00baa11 (patch) | |
| tree | 1c706f022e2b84be0a01e5bc577075ba30276011 /src/cpu/o3/iew.hh | |
| parent | 4d1bcbcd36e5735e76b38abb151de716c31a2272 (diff) | |
| parent | 16c1b5484f576b6aebea9ab5ffab4ea64f080de0 (diff) | |
| download | gem5-ed1db23b414a372a012d406d5a684775f00baa11.tar.xz | |
Merge vm1.(none):/home/stever/bk/newmem-head
into vm1.(none):/home/stever/bk/newmem-cache2
--HG--
extra : convert_revision : aa50af3094f5d459f75b514179b6e3ec5e0bf1df
Diffstat (limited to 'src/cpu/o3/iew.hh')
| -rw-r--r-- | src/cpu/o3/iew.hh | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/cpu/o3/iew.hh b/src/cpu/o3/iew.hh index ce2991cfb..eef5a15d2 100644 --- a/src/cpu/o3/iew.hh +++ b/src/cpu/o3/iew.hh @@ -402,9 +402,6 @@ class DefaultIEW /** Records if there is a fetch redirect on this cycle for each thread. */ bool fetchRedirect[Impl::MaxThreads]; - /** Keeps track of the last valid branch delay slot instss for threads */ - InstSeqNum bdelayDoneSeqNum[Impl::MaxThreads]; - /** Used to track if all instructions have been dispatched this cycle. * If they have not, then blocking must have occurred, and the instructions * would already be added to the skid buffer. |