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author | Gabe Black <gblack@eecs.umich.edu> | 2006-10-12 10:58:45 -0400 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2006-10-12 10:58:45 -0400 |
commit | 866cfaf9dc596d8547e14bc2133fb962776572a7 (patch) | |
tree | 19b82a8021533e8bc2e35f14fb0b6a0440756814 /src/cpu/o3/iew_impl.hh | |
parent | 6a31898a88a9ecced399ccf50636831c21d4a75e (diff) | |
parent | 78aec04b660544ea7af80d76912b4422c4426602 (diff) | |
download | gem5-866cfaf9dc596d8547e14bc2133fb962776572a7.tar.xz |
Merge zizzer.eecs.umich.edu:/bk/newmem
into zeep.eecs.umich.edu:/home/gblack/m5/newmem
--HG--
extra : convert_revision : 30b2475ba034550376455e1bc0e52e19a200fd5a
Diffstat (limited to 'src/cpu/o3/iew_impl.hh')
-rw-r--r-- | src/cpu/o3/iew_impl.hh | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/cpu/o3/iew_impl.hh b/src/cpu/o3/iew_impl.hh index b2baae296..ba5260fe2 100644 --- a/src/cpu/o3/iew_impl.hh +++ b/src/cpu/o3/iew_impl.hh @@ -600,6 +600,11 @@ template<class Impl> void DefaultIEW<Impl>::instToCommit(DynInstPtr &inst) { + // This function should not be called after writebackInsts in a + // single cycle. That will cause problems with an instruction + // being added to the queue to commit without being processed by + // writebackInsts prior to being sent to commit. + // First check the time slot that this instruction will write // to. If there are free write ports at the time, then go ahead // and write the instruction to that time. If there are not, @@ -1286,6 +1291,7 @@ DefaultIEW<Impl>::executeInsts() } else if (fault != NoFault) { // If the instruction faulted, then we need to send it along to commit // without the instruction completing. + DPRINTF(IEW, "Store has fault! [sn:%lli]\n", inst->seqNum); // Send this instruction to commit, also make sure iew stage // realizes there is activity. |