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authorMin Kyu Jeong <minkyu.jeong@arm.com>2010-12-07 16:19:57 -0800
committerMin Kyu Jeong <minkyu.jeong@arm.com>2010-12-07 16:19:57 -0800
commit4bbdd6ceb2639fe21408ab211b7c4c7e53adb249 (patch)
treeb2fb062d30bc3b091d4390a671a2b0268e166121 /src/cpu/o3/iew_impl.hh
parent21bfbd422cb9d043f88bd7f5ca9d4c72b97f9f33 (diff)
downloadgem5-4bbdd6ceb2639fe21408ab211b7c4c7e53adb249.tar.xz
O3: Support SWAP and predicated loads/store in ARM.
Diffstat (limited to 'src/cpu/o3/iew_impl.hh')
-rw-r--r--src/cpu/o3/iew_impl.hh15
1 files changed, 4 insertions, 11 deletions
diff --git a/src/cpu/o3/iew_impl.hh b/src/cpu/o3/iew_impl.hh
index 608e70cde..521f07089 100644
--- a/src/cpu/o3/iew_impl.hh
+++ b/src/cpu/o3/iew_impl.hh
@@ -1236,20 +1236,13 @@ DefaultIEW<Impl>::executeInsts()
fault = ldstQueue.executeStore(inst);
// If the store had a fault then it may not have a mem req
- if (!inst->isStoreConditional() && fault == NoFault) {
- inst->setExecuted();
-
- instToCommit(inst);
- } else if (fault != NoFault) {
- // If the instruction faulted, then we need to send it along to commit
- // without the instruction completing.
- DPRINTF(IEW, "Store has fault %s! [sn:%lli]\n",
- fault->name(), inst->seqNum);
-
+ if (fault != NoFault || inst->readPredicate() == false ||
+ !inst->isStoreConditional()) {
+ // If the instruction faulted, then we need to send it along
+ // to commit without the instruction completing.
// Send this instruction to commit, also make sure iew stage
// realizes there is activity.
inst->setExecuted();
-
instToCommit(inst);
activityThisCycle();
}