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| author | Joel Hestness <hestness@cs.utexas.edu> | 2011-02-06 22:14:17 -0800 |
|---|---|---|
| committer | Joel Hestness <hestness@cs.utexas.edu> | 2011-02-06 22:14:17 -0800 |
| commit | b4c10bd6800b5ab5adee3035f1908d7a49a14ca9 (patch) | |
| tree | d21b1bbf5c8df8c77d77b6983779b24189a1d8cb /src/cpu/o3/iew_impl.hh | |
| parent | a679e732cee821616c20cc13c22ad2877072ff14 (diff) | |
| download | gem5-b4c10bd6800b5ab5adee3035f1908d7a49a14ca9.tar.xz | |
mcpat: Adds McPAT performance counters
Updated patches from Rick Strong's set that modify performance counters for
McPAT
Diffstat (limited to 'src/cpu/o3/iew_impl.hh')
| -rw-r--r-- | src/cpu/o3/iew_impl.hh | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/cpu/o3/iew_impl.hh b/src/cpu/o3/iew_impl.hh index ce58868ba..3f3761ff3 100644 --- a/src/cpu/o3/iew_impl.hh +++ b/src/cpu/o3/iew_impl.hh @@ -698,6 +698,7 @@ DefaultIEW<Impl>::updateStatus() // If there are no ready instructions waiting to be scheduled by the IQ, // and there's no stores waiting to write back, and dispatch is not // unblocking, then there is no internal activity for the IEW stage. + instQueue.intInstQueueReads++; if (_status == Active && !instQueue.hasReadyInsts() && !ldstQueue.willWB() && !any_unblocking) { DPRINTF(IEW, "IEW switching to idle\n"); |