diff options
author | Andreas Sandberg <Andreas.Sandberg@ARM.com> | 2013-01-07 13:05:46 -0500 |
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committer | Andreas Sandberg <Andreas.Sandberg@ARM.com> | 2013-01-07 13:05:46 -0500 |
commit | 1814a85a055732baf98fd030441bb4c5c5db9bdc (patch) | |
tree | 33dd6adc62342a55ac3b0f4dbe9fdb9d82faa323 /src/cpu/o3/iew_impl.hh | |
parent | 9e8003148f78811e600e51a900f96b71cb525b60 (diff) | |
download | gem5-1814a85a055732baf98fd030441bb4c5c5db9bdc.tar.xz |
cpu: Rewrite O3 draining to avoid stopping in microcode
Previously, the O3 CPU could stop in the middle of a microcode
sequence. This patch makes sure that the pipeline stops when it has
committed a normal instruction or exited from a microcode
sequence. Additionally, it makes sure that the pipeline has no
instructions in flight when it is drained, which should make draining
more robust.
Draining is controlled in the commit stage, which checks if the next
PC after a committed instruction is in microcode. If this isn't the
case, it requests a squash of all instructions after that the
instruction that just committed and immediately signals a drain stall
to the fetch stage. The CPU then continues to execute until the
pipeline and all associated buffers are empty.
Diffstat (limited to 'src/cpu/o3/iew_impl.hh')
-rw-r--r-- | src/cpu/o3/iew_impl.hh | 52 |
1 files changed, 23 insertions, 29 deletions
diff --git a/src/cpu/o3/iew_impl.hh b/src/cpu/o3/iew_impl.hh index e25c8829b..4b4f66a1f 100644 --- a/src/cpu/o3/iew_impl.hh +++ b/src/cpu/o3/iew_impl.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2011 ARM Limited + * Copyright (c) 2010-2012 ARM Limited * All rights reserved. * * The license below extends only to copyright in the software and shall @@ -54,6 +54,7 @@ #include "cpu/timebuf.hh" #include "debug/Activity.hh" #include "debug/Decode.hh" +#include "debug/Drain.hh" #include "debug/IEW.hh" #include "params/DerivO3CPU.hh" @@ -73,8 +74,7 @@ DefaultIEW<Impl>::DefaultIEW(O3CPU *_cpu, DerivO3CPUParams *params) issueWidth(params->issueWidth), wbOutstanding(0), wbWidth(params->wbWidth), - numThreads(params->numThreads), - switchedOut(false) + numThreads(params->numThreads) { _status = Active; exeStatus = Running; @@ -360,38 +360,33 @@ DefaultIEW<Impl>::setScoreboard(Scoreboard *sb_ptr) template <class Impl> bool -DefaultIEW<Impl>::drain() +DefaultIEW<Impl>::isDrained() const { - // IEW is ready to drain at any time. - cpu->signalDrained(); - return true; -} + bool drained(ldstQueue.isDrained()); -template <class Impl> -void -DefaultIEW<Impl>::resume() -{ + for (ThreadID tid = 0; tid < numThreads; tid++) { + if (!insts[tid].empty()) { + DPRINTF(Drain, "%i: Insts not empty.\n", tid); + drained = false; + } + if (!skidBuffer[tid].empty()) { + DPRINTF(Drain, "%i: Skid buffer not empty.\n", tid); + drained = false; + } + } + + return drained; } template <class Impl> void -DefaultIEW<Impl>::switchOut() +DefaultIEW<Impl>::drainSanityCheck() const { - // Clear any state. - switchedOut = true; - assert(insts[0].empty()); - assert(skidBuffer[0].empty()); + assert(isDrained()); - instQueue.switchOut(); - ldstQueue.switchOut(); - fuPool->switchOut(); - - for (ThreadID tid = 0; tid < numThreads; tid++) { - while (!insts[tid].empty()) - insts[tid].pop(); - while (!skidBuffer[tid].empty()) - skidBuffer[tid].pop(); - } + instQueue.drainSanityCheck(); + ldstQueue.drainSanityCheck(); + fuPool->drainSanityCheck(); } template <class Impl> @@ -402,11 +397,10 @@ DefaultIEW<Impl>::takeOverFrom() _status = Active; exeStatus = Running; wbStatus = Idle; - switchedOut = false; instQueue.takeOverFrom(); ldstQueue.takeOverFrom(); - fuPool->takeOver(); + fuPool->takeOverFrom(); startupStage(); cpu->activityThisCycle(); |