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authorRekai Gonzalez-Alberquilla <rekai.gonzalezalberquilla@arm.com>2017-02-06 11:10:06 +0000
committerGiacomo Gabrielli <giacomo.gabrielli@arm.com>2018-11-16 10:39:03 +0000
commit0c50a0b4fe3956f9d2e08e75d47c9cbd79bf0268 (patch)
tree7679abe2343e0504c93eb73d09635d546a211455 /src/cpu/o3/inst_queue.hh
parent338a173e822298bd22741342a7b24352450afdd1 (diff)
downloadgem5-0c50a0b4fe3956f9d2e08e75d47c9cbd79bf0268.tar.xz
cpu: Fix the usage of const DynInstPtr
Summary: Usage of const DynInstPtr& when possible and introduction of move operators to RefCountingPtr. In many places, scoped references to dynamic instructions do a copy of the DynInstPtr when a reference would do. This is detrimental to performance. On top of that, in case there is a need for reference tracking for debugging, the redundant copies make the process much more painful than it already is. Also, from the theoretical point of view, a function/method that defines a convenience name to access an instruction should not be considered an owner of the data, i.e., doing a copy and not a reference is not justified. On a related topic, C++11 introduces move semantics, and those are useful when, for example, there is a class modelling a HW structure that contains a list, and has a getHeadOfList function, to prevent doing a copy to an internal variable -> update pointer, remove from the list -> update pointer, return value making a copy to the assined variable -> update pointer, destroy the returned value -> update pointer. Change-Id: I3bb46c20ef23b6873b469fd22befb251ac44d2f6 Signed-off-by: Giacomo Gabrielli <giacomo.gabrielli@arm.com> Reviewed-on: https://gem5-review.googlesource.com/c/13105 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'src/cpu/o3/inst_queue.hh')
-rw-r--r--src/cpu/o3/inst_queue.hh34
1 files changed, 17 insertions, 17 deletions
diff --git a/src/cpu/o3/inst_queue.hh b/src/cpu/o3/inst_queue.hh
index 64f8aa1be..37cc3a2bb 100644
--- a/src/cpu/o3/inst_queue.hh
+++ b/src/cpu/o3/inst_queue.hh
@@ -113,7 +113,7 @@ class InstructionQueue
public:
/** Construct a FU completion event. */
- FUCompletion(DynInstPtr &_inst, int fu_idx,
+ FUCompletion(const DynInstPtr &_inst, int fu_idx,
InstructionQueue<Impl> *iq_ptr);
virtual void process();
@@ -176,15 +176,15 @@ class InstructionQueue
bool hasReadyInsts();
/** Inserts a new instruction into the IQ. */
- void insert(DynInstPtr &new_inst);
+ void insert(const DynInstPtr &new_inst);
/** Inserts a new, non-speculative instruction into the IQ. */
- void insertNonSpec(DynInstPtr &new_inst);
+ void insertNonSpec(const DynInstPtr &new_inst);
/** Inserts a memory or write barrier into the IQ to make sure
* loads and stores are ordered properly.
*/
- void insertBarrier(DynInstPtr &barr_inst);
+ void insertBarrier(const DynInstPtr &barr_inst);
/** Returns the oldest scheduled instruction, and removes it from
* the list of instructions waiting to execute.
@@ -205,11 +205,11 @@ class InstructionQueue
* Records the instruction as the producer of a register without
* adding it to the rest of the IQ.
*/
- void recordProducer(DynInstPtr &inst)
+ void recordProducer(const DynInstPtr &inst)
{ addToProducers(inst); }
/** Process FU completion event. */
- void processFUCompletion(DynInstPtr &inst, int fu_idx);
+ void processFUCompletion(const DynInstPtr &inst, int fu_idx);
/**
* Schedules ready instructions, adding the ready ones (oldest first) to
@@ -227,37 +227,37 @@ class InstructionQueue
void commit(const InstSeqNum &inst, ThreadID tid = 0);
/** Wakes all dependents of a completed instruction. */
- int wakeDependents(DynInstPtr &completed_inst);
+ int wakeDependents(const DynInstPtr &completed_inst);
/** Adds a ready memory instruction to the ready list. */
- void addReadyMemInst(DynInstPtr &ready_inst);
+ void addReadyMemInst(const DynInstPtr &ready_inst);
/**
* Reschedules a memory instruction. It will be ready to issue once
* replayMemInst() is called.
*/
- void rescheduleMemInst(DynInstPtr &resched_inst);
+ void rescheduleMemInst(const DynInstPtr &resched_inst);
/** Replays a memory instruction. It must be rescheduled first. */
- void replayMemInst(DynInstPtr &replay_inst);
+ void replayMemInst(const DynInstPtr &replay_inst);
/** Completes a memory operation. */
- void completeMemInst(DynInstPtr &completed_inst);
+ void completeMemInst(const DynInstPtr &completed_inst);
/**
* Defers a memory instruction when its DTB translation incurs a hw
* page table walk.
*/
- void deferMemInst(DynInstPtr &deferred_inst);
+ void deferMemInst(const DynInstPtr &deferred_inst);
/** Defers a memory instruction when it is cache blocked. */
- void blockMemInst(DynInstPtr &blocked_inst);
+ void blockMemInst(const DynInstPtr &blocked_inst);
/** Notify instruction queue that a previous blockage has resolved */
void cacheUnblocked();
/** Indicates an ordering violation between a store and a load. */
- void violation(DynInstPtr &store, DynInstPtr &faulting_load);
+ void violation(const DynInstPtr &store, const DynInstPtr &faulting_load);
/**
* Squashes instructions for a thread. Squashing information is obtained
@@ -457,13 +457,13 @@ class InstructionQueue
std::vector<bool> regScoreboard;
/** Adds an instruction to the dependency graph, as a consumer. */
- bool addToDependents(DynInstPtr &new_inst);
+ bool addToDependents(const DynInstPtr &new_inst);
/** Adds an instruction to the dependency graph, as a producer. */
- void addToProducers(DynInstPtr &new_inst);
+ void addToProducers(const DynInstPtr &new_inst);
/** Moves an instruction to the ready queue if it is ready. */
- void addIfReady(DynInstPtr &inst);
+ void addIfReady(const DynInstPtr &inst);
/** Debugging function to count how many entries are in the IQ. It does
* a linear walk through the instructions, so do not call this function