diff options
| author | Andreas Hansson <andreas.hansson@arm.com> | 2012-09-07 12:34:38 -0400 |
|---|---|---|
| committer | Andreas Hansson <andreas.hansson@arm.com> | 2012-09-07 12:34:38 -0400 |
| commit | 287ea1a081c5dd3213069755dbbd3d7bf736bacc (patch) | |
| tree | e48487569786a562138445d746354b610cf5011f /src/cpu/o3/inst_queue_impl.hh | |
| parent | 4124ea09f8e2f6934fe746ff7c244dba7230cac9 (diff) | |
| download | gem5-287ea1a081c5dd3213069755dbbd3d7bf736bacc.tar.xz | |
Param: Transition to Cycles for relevant parameters
This patch is a first step to using Cycles as a parameter type. The
main affected modules are the CPUs and the Ruby caches. There are
definitely plenty more places that are affected, but this patch serves
as a starting point to making the transition.
An important part of this patch is to actually enable parameters to be
specified as Param.Cycles which involves some changes to params.py.
Diffstat (limited to 'src/cpu/o3/inst_queue_impl.hh')
| -rw-r--r-- | src/cpu/o3/inst_queue_impl.hh | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/cpu/o3/inst_queue_impl.hh b/src/cpu/o3/inst_queue_impl.hh index a8f14287a..785f86676 100644 --- a/src/cpu/o3/inst_queue_impl.hh +++ b/src/cpu/o3/inst_queue_impl.hh @@ -800,7 +800,7 @@ InstructionQueue<Impl>::scheduleReadyInsts() } int idx = -2; - int op_latency = 1; + Cycles op_latency = Cycles(1); ThreadID tid = issuing_inst->threadNumber; if (op_class != No_OpClass) { @@ -814,7 +814,7 @@ InstructionQueue<Impl>::scheduleReadyInsts() // If we have an instruction that doesn't require a FU, or a // valid FU, then schedule for execution. if (idx == -2 || idx != -1) { - if (op_latency == 1) { + if (op_latency == Cycles(1)) { i2e_info->size++; instsToExecute.push_back(issuing_inst); @@ -823,7 +823,7 @@ InstructionQueue<Impl>::scheduleReadyInsts() if (idx >= 0) fuPool->freeUnitNextCycle(idx); } else { - int issue_latency = fuPool->getIssueLatency(op_class); + Cycles issue_latency = fuPool->getIssueLatency(op_class); // Generate completion event for the FU FUCompletion *execution = new FUCompletion(issuing_inst, idx, this); @@ -832,7 +832,7 @@ InstructionQueue<Impl>::scheduleReadyInsts() cpu->clockEdge(Cycles(op_latency - 1))); // @todo: Enforce that issue_latency == 1 or op_latency - if (issue_latency > 1) { + if (issue_latency > Cycles(1)) { // If FU isn't pipelined, then it must be freed // upon the execution completing. execution->setFreeFU(); |