diff options
| author | Rekai Gonzalez-Alberquilla <rekai.gonzalezalberquilla@arm.com> | 2017-02-10 17:30:22 +0000 |
|---|---|---|
| committer | Giacomo Gabrielli <giacomo.gabrielli@arm.com> | 2018-11-28 14:12:35 +0000 |
| commit | 3bb49cb2b01e55e33cd2ca7a872be65c49fabfc6 (patch) | |
| tree | bb90dca9ef7fc42df1869eeaba8fce9d41c32926 /src/cpu/o3/inst_queue_impl.hh | |
| parent | c918d1435c243f2c74969b35793a87e10796c1a6 (diff) | |
| download | gem5-3bb49cb2b01e55e33cd2ca7a872be65c49fabfc6.tar.xz | |
cpu,arch-arm: Initialise data members
The value that is not initialized has a bogus value that manifests when
using some debug-flags what makes the usage of tracediff a bit more
challenging.
In addition, while debugging with other techniques, it introduces the
problem of understanding if the value of a field is 'intended' or just
an effect of the lack of initialisation.
Change-Id: Ied88caa77479c6f1d5166d80d1a1a057503cb106
Signed-off-by: Giacomo Gabrielli <giacomo.gabrielli@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/13125
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'src/cpu/o3/inst_queue_impl.hh')
| -rw-r--r-- | src/cpu/o3/inst_queue_impl.hh | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/src/cpu/o3/inst_queue_impl.hh b/src/cpu/o3/inst_queue_impl.hh index 410c15ffa..b34e6d980 100644 --- a/src/cpu/o3/inst_queue_impl.hh +++ b/src/cpu/o3/inst_queue_impl.hh @@ -113,7 +113,7 @@ InstructionQueue<Impl>::InstructionQueue(O3CPU *cpu_ptr, IEW *iew_ptr, regScoreboard.resize(numPhysRegs); //Initialize Mem Dependence Units - for (ThreadID tid = 0; tid < numThreads; tid++) { + for (ThreadID tid = 0; tid < Impl::MaxThreads; tid++) { memDepUnit[tid].init(params, tid); memDepUnit[tid].setIQ(this); } @@ -166,6 +166,9 @@ InstructionQueue<Impl>::InstructionQueue(O3CPU *cpu_ptr, IEW *iew_ptr, panic("Invalid IQ sharing policy. Options are: Dynamic, " "Partitioned, Threshold"); } + for (ThreadID tid = numThreads; tid < Impl::MaxThreads; tid++) { + maxEntries[tid] = 0; + } } template <class Impl> @@ -407,7 +410,7 @@ void InstructionQueue<Impl>::resetState() { //Initialize thread IQ counts - for (ThreadID tid = 0; tid <numThreads; tid++) { + for (ThreadID tid = 0; tid < Impl::MaxThreads; tid++) { count[tid] = 0; instList[tid].clear(); } @@ -424,7 +427,7 @@ InstructionQueue<Impl>::resetState() regScoreboard[i] = false; } - for (ThreadID tid = 0; tid < numThreads; ++tid) { + for (ThreadID tid = 0; tid < Impl::MaxThreads; ++tid) { squashedSeqNum[tid] = 0; } |