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authorSteve Reinhardt <stever@eecs.umich.edu>2006-09-01 17:12:43 -0700
committerSteve Reinhardt <stever@eecs.umich.edu>2006-09-01 17:12:43 -0700
commitabe18be544014bee31d586bf8b26ab5b622b70b7 (patch)
treead4059302f30b79257cb50cb8e51c5da38c6418c /src/cpu/o3/inst_queue_impl.hh
parentedeb8f39a7c3cbcf428743aca3017fa42865b04a (diff)
parentd8501ec17c590a0c6f5be92e121381667ca726b6 (diff)
downloadgem5-abe18be544014bee31d586bf8b26ab5b622b70b7.tar.xz
Merge zizzer.eecs.umich.edu:/bk/newmem
into vm1.(none):/home/stever/bk/newmem-head --HG-- extra : convert_revision : 8b0fbb6b1ea38d01d048381f18fd95ab63c4c0f1
Diffstat (limited to 'src/cpu/o3/inst_queue_impl.hh')
-rw-r--r--src/cpu/o3/inst_queue_impl.hh6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/cpu/o3/inst_queue_impl.hh b/src/cpu/o3/inst_queue_impl.hh
index e7991662b..47634f645 100644
--- a/src/cpu/o3/inst_queue_impl.hh
+++ b/src/cpu/o3/inst_queue_impl.hh
@@ -991,10 +991,10 @@ InstructionQueue<Impl>::squash(unsigned tid)
// Read instruction sequence number of last instruction out of the
// time buffer.
-#if THE_ISA == ALPHA_ISA
- squashedSeqNum[tid] = fromCommit->commitInfo[tid].doneSeqNum;
-#else
+#if ISA_HAS_DELAY_SLOT
squashedSeqNum[tid] = fromCommit->commitInfo[tid].bdelayDoneSeqNum;
+#else
+ squashedSeqNum[tid] = fromCommit->commitInfo[tid].doneSeqNum;
#endif
// Call doSquash if there are insts in the IQ