Pass ISA-specific O3 CPU as a constructor parameter instead of using setCPU functions.

src/cpu/o3/alpha/cpu_impl.hh:
    Pass ISA-specific O3 CPU to FullO3CPU as a constructor parameter instead of using setCPU functions.

--HG--
extra : convert_revision : 74f4b1f5fb6f95a56081f367cce7ff44acb5688a

1 files changed, 8 insertions, 12 deletions

diff --git a/src/cpu/o3/lsq.hh b/src/cpu/o3/lsq.hh
index 80f53a726..fd8f878a7 100644
--- a/src/cpu/o3/lsq.hh
+++ b/src/cpu/o3/lsq.hh
@@ -57,7 +57,7 @@ class LSQ {
     };
 
     /** Constructs an LSQ with the given parameters. */
-    LSQ(Params *params);
+    LSQ(O3CPU *cpu_ptr, IEW *iew_ptr, Params *params);
 
     /** Returns the name of the LSQ. */
     std::string name() const;
@@ -74,10 +74,6 @@ class LSQ {
 
     /** Sets the pointer to the list of active threads. */
     void setActiveThreads(std::list<unsigned> *at_ptr);
-    /** Sets the CPU pointer. */
-    void setCPU(O3CPU *cpu_ptr);
-    /** Sets the IEW stage pointer. */
-    void setIEW(IEW *iew_ptr);
     /** Switches out the LSQ. */
     void switchOut();
     /** Takes over execution from another CPU's thread. */
@@ -283,6 +279,12 @@ class LSQ {
     template <class T>
     Fault write(RequestPtr req, T &data, int store_idx);
 
+    /** The CPU pointer. */
+    O3CPU *cpu;
+
+    /** The IEW stage pointer. */
+    IEW *iewStage;
+
     /** DcachePort class for this LSQ.  Handles doing the
      * communication with the cache/memory.
      */
@@ -295,7 +297,7 @@ class LSQ {
       public:
         /** Default constructor. */
         DcachePort(LSQ *_lsq)
-            : lsq(_lsq)
+            : Port(_lsq->name() + "-dport"), lsq(_lsq)
         { }
 
         bool snoopRangeSent;
@@ -341,12 +343,6 @@ class LSQ {
     /** The LSQ units for individual threads. */
     LSQUnit thread[Impl::MaxThreads];
 
-    /** The CPU pointer. */
-    O3CPU *cpu;
-
-    /** The IEW stage pointer. */
-    IEW *iewStage;
-
     /** List of Active Threads in System. */
     std::list<unsigned> *activeThreads;