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authorGabe Black <gblack@eecs.umich.edu>2010-08-13 06:16:02 -0700
committerGabe Black <gblack@eecs.umich.edu>2010-08-13 06:16:02 -0700
commitaa8c6e9c959eab4d516bc07593bea20ade9ad80c (patch)
tree3e0112e567da5dc1aa019f85458fbd9e37ad0cf2 /src/cpu/o3/lsq.hh
parent65dbcc6ea170e05ca2370a9a265a61668250fa98 (diff)
downloadgem5-aa8c6e9c959eab4d516bc07593bea20ade9ad80c.tar.xz
CPU: Add readBytes and writeBytes functions to the exec contexts.
Diffstat (limited to 'src/cpu/o3/lsq.hh')
-rw-r--r--src/cpu/o3/lsq.hh12
1 files changed, 4 insertions, 8 deletions
diff --git a/src/cpu/o3/lsq.hh b/src/cpu/o3/lsq.hh
index 7a7ea917f..0ad5d51c2 100644
--- a/src/cpu/o3/lsq.hh
+++ b/src/cpu/o3/lsq.hh
@@ -273,16 +273,14 @@ class LSQ {
/** Executes a read operation, using the load specified at the load
* index.
*/
- template <class T>
Fault read(RequestPtr req, RequestPtr sreqLow, RequestPtr sreqHigh,
- T &data, int load_idx);
+ uint8_t *data, int load_idx);
/** Executes a store operation, using the store specified at the store
* index.
*/
- template <class T>
Fault write(RequestPtr req, RequestPtr sreqLow, RequestPtr sreqHigh,
- T &data, int store_idx);
+ uint8_t *data, int store_idx);
/** The CPU pointer. */
O3CPU *cpu;
@@ -371,10 +369,9 @@ class LSQ {
};
template <class Impl>
-template <class T>
Fault
LSQ<Impl>::read(RequestPtr req, RequestPtr sreqLow, RequestPtr sreqHigh,
- T &data, int load_idx)
+ uint8_t *data, int load_idx)
{
ThreadID tid = req->threadId();
@@ -382,10 +379,9 @@ LSQ<Impl>::read(RequestPtr req, RequestPtr sreqLow, RequestPtr sreqHigh,
}
template <class Impl>
-template <class T>
Fault
LSQ<Impl>::write(RequestPtr req, RequestPtr sreqLow, RequestPtr sreqHigh,
- T &data, int store_idx)
+ uint8_t *data, int store_idx)
{
ThreadID tid = req->threadId();