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| author | Ron Dreslinski <rdreslin@umich.edu> | 2006-11-13 18:51:16 -0500 |
|---|---|---|
| committer | Ron Dreslinski <rdreslin@umich.edu> | 2006-11-13 18:51:16 -0500 |
| commit | a962fc4f561126bea65f3dd52a7194c5527d255a (patch) | |
| tree | 0371556ab67772ca4023acd65618df67d123bb5d /src/cpu/o3/lsq_impl.hh | |
| parent | 023fccff0e7f6e2be144c56567b58845cc7383f5 (diff) | |
| download | gem5-a962fc4f561126bea65f3dd52a7194c5527d255a.tar.xz | |
Make CPU models signal to update the snoop ranges
--HG--
extra : convert_revision : 717b62510f28a69af99453309fbbb458359eeb2a
Diffstat (limited to 'src/cpu/o3/lsq_impl.hh')
| -rw-r--r-- | src/cpu/o3/lsq_impl.hh | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/src/cpu/o3/lsq_impl.hh b/src/cpu/o3/lsq_impl.hh index 5e7945c1c..6758e51c8 100644 --- a/src/cpu/o3/lsq_impl.hh +++ b/src/cpu/o3/lsq_impl.hh @@ -53,9 +53,13 @@ template <class Impl> void LSQ<Impl>::DcachePort::recvStatusChange(Status status) { - if (status == RangeChange) + if (status == RangeChange) { + if (!snoopRangeSent) { + snoopRangeSent = true; + sendStatusChange(Port::RangeChange); + } return; - + } panic("O3CPU doesn't expect recvStatusChange callback!"); } @@ -97,6 +101,8 @@ LSQ<Impl>::LSQ(Params *params) { DPRINTF(LSQ, "Creating LSQ object.\n"); + dcachePort.snoopRangeSent = false; + //**********************************************/ //************ Handle SMT Parameters ***********/ //**********************************************/ |