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| author | Kevin Lim <ktlim@umich.edu> | 2006-07-06 23:13:38 -0400 |
|---|---|---|
| committer | Kevin Lim <ktlim@umich.edu> | 2006-07-06 23:13:38 -0400 |
| commit | fff75316771331ec3247cbd6e424a93b252a1e29 (patch) | |
| tree | 0e2e96841ebd160ef0160dd3dc56aa0a56696b86 /src/cpu/o3/lsq_impl.hh | |
| parent | fbe3e22474184e537fe74f4e86277056026f0514 (diff) | |
| download | gem5-fff75316771331ec3247cbd6e424a93b252a1e29.tar.xz | |
Support serializing and unserializing in the O3 CPU. Also a few small fixes for draining/switching CPUs.
src/cpu/o3/commit_impl.hh:
Fix to clear drainPending variable on call to resume.
src/cpu/o3/cpu.cc:
src/cpu/o3/cpu.hh:
Support serializing and unserializing in the O3 CPU.
src/cpu/o3/lsq_impl.hh:
Be sure to say we have no stores to write back if the active thread list is empty.
src/cpu/simple_thread.cc:
src/cpu/simple_thread.hh:
Slightly change how SimpleThread is used to copy from other ThreadContexts.
--HG--
extra : convert_revision : 92a5109b3783a989d5b451036061ef82c56d3121
Diffstat (limited to 'src/cpu/o3/lsq_impl.hh')
| -rw-r--r-- | src/cpu/o3/lsq_impl.hh | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/cpu/o3/lsq_impl.hh b/src/cpu/o3/lsq_impl.hh index 5173f8be1..89fd1a71d 100644 --- a/src/cpu/o3/lsq_impl.hh +++ b/src/cpu/o3/lsq_impl.hh @@ -502,6 +502,9 @@ LSQ<Impl>::hasStoresToWB() { list<unsigned>::iterator active_threads = (*activeThreads).begin(); + if ((*activeThreads).empty()) + return false; + while (active_threads != (*activeThreads).end()) { unsigned tid = *active_threads++; if (!hasStoresToWB(tid)) |