Move Dcache port creation from LSQUnit to LSQ in order to support Ron's recent changes, and using the O3CPU in SMT mode.

src/cpu/o3/lsq.hh:
    Update to have LSQ work with only one dcache port for all LSQ Units.  LSQ has the dcache port, and the LSQ Units must tell the LSQ if the cache has become blocked.
src/cpu/o3/lsq_impl.hh:
    Updates to have the LSQ work with only one dcache port for all LSQUnits.
src/cpu/o3/lsq_unit.hh:
src/cpu/o3/lsq_unit_impl.hh:
    Update for LSQ to create dcache port instead of LSQUnits.  Now LSQUnits are given the dcache port from the LSQ, and also must check the LSQ if the cache is blocked prior to accessing the cache.

--HG--
extra : convert_revision : 2708adbf323f4e7647dc0c1e31ef5bb4596b89f8

1 files changed, 50 insertions, 3 deletions

diff --git a/src/cpu/o3/lsq_impl.hh b/src/cpu/o3/lsq_impl.hh
index 89fd1a71d..4e3957029 100644
--- a/src/cpu/o3/lsq_impl.hh
+++ b/src/cpu/o3/lsq_impl.hh
@@ -36,9 +36,53 @@
 using namespace std;
 
 template <class Impl>
+Tick
+LSQ<Impl>::DcachePort::recvAtomic(PacketPtr pkt)
+{
+    panic("O3CPU model does not work with atomic mode!");
+    return curTick;
+}
+
+template <class Impl>
+void
+LSQ<Impl>::DcachePort::recvFunctional(PacketPtr pkt)
+{
+    panic("O3CPU doesn't expect recvFunctional callback!");
+}
+
+template <class Impl>
+void
+LSQ<Impl>::DcachePort::recvStatusChange(Status status)
+{
+    if (status == RangeChange)
+        return;
+
+    panic("O3CPU doesn't expect recvStatusChange callback!");
+}
+
+template <class Impl>
+bool
+LSQ<Impl>::DcachePort::recvTiming(PacketPtr pkt)
+{
+    lsq->thread[pkt->req->getThreadNum()].completeDataAccess(pkt);
+    return true;
+}
+
+template <class Impl>
+void
+LSQ<Impl>::DcachePort::recvRetry()
+{
+    lsq->thread[lsq->retryTid].recvRetry();
+    // Speculatively clear the retry Tid.  This will get set again if
+    // the LSQUnit was unable to complete its access.
+    lsq->retryTid = -1;
+}
+
+template <class Impl>
 LSQ<Impl>::LSQ(Params *params)
-    : LQEntries(params->LQEntries), SQEntries(params->SQEntries),
-      numThreads(params->numberOfThreads)
+    : dcachePort(this), LQEntries(params->LQEntries),
+      SQEntries(params->SQEntries), numThreads(params->numberOfThreads),
+      retryTid(-1)
 {
     DPRINTF(LSQ, "Creating LSQ object.\n");
 
@@ -94,7 +138,8 @@ LSQ<Impl>::LSQ(Params *params)
 
     //Initialize LSQs
     for (int tid=0; tid < numThreads; tid++) {
-        thread[tid].init(params, maxLQEntries, maxSQEntries, tid);
+        thread[tid].init(params, this, maxLQEntries, maxSQEntries, tid);
+        thread[tid].setDcachePort(&dcachePort);
     }
 }
 
@@ -130,6 +175,8 @@ LSQ<Impl>::setCPU(O3CPU *cpu_ptr)
 {
     cpu = cpu_ptr;
 
+    dcachePort.setName(name());
+
     for (int tid=0; tid < numThreads; tid++) {
         thread[tid].setCPU(cpu_ptr);
     }