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authorRon Dreslinski <rdreslin@umich.edu>2006-10-19 20:02:57 -0400
committerRon Dreslinski <rdreslin@umich.edu>2006-10-19 20:02:57 -0400
commite34e564f79a9c471a3ff911b8faf7a761a59d8de (patch)
tree9dfa6283d72a1d401bab60922d1dd7b2a4cdda59 /src/cpu/o3/lsq_impl.hh
parent9cf063eb8e0b9d4af40f0e8fe609f9135be899f5 (diff)
downloadgem5-e34e564f79a9c471a3ff911b8faf7a761a59d8de.tar.xz
Fixes to get single level uni-coherence to work.
Now to try L2 caches in FS. src/mem/cache/base_cache.hh: Fix uni-coherence for atomic accesses in coherence protocol access to port src/mem/cache/cache_impl.hh: Properly handle uni-coherence src/mem/cache/coherence/simple_coherence.hh: Properly forward invalidates (not done for MSI+ protocols (assumed top level for now) src/mem/cache/coherence/uni_coherence.cc: src/mem/cache/coherence/uni_coherence.hh: Properly forward invalidates in atomic/timing uni-coherence --HG-- extra : convert_revision : f0f11315e8e7f32c19d92287f6f9c27b079c96f7
Diffstat (limited to 'src/cpu/o3/lsq_impl.hh')
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