diff options
| author | Stephan Diestelhorst <stephan.diestelhorst@arm.com> | 2014-12-02 06:07:58 -0500 |
|---|---|---|
| committer | Stephan Diestelhorst <stephan.diestelhorst@arm.com> | 2014-12-02 06:07:58 -0500 |
| commit | 810349a8a789b0a99d6268fe725eca2e00cb9558 (patch) | |
| tree | 3048a55622223762d324233da225e48746072567 /src/cpu/o3/lsq_impl.hh | |
| parent | 5c84157c291dceb8040ab4dd29142a4d141fd2ed (diff) | |
| download | gem5-810349a8a789b0a99d6268fe725eca2e00cb9558.tar.xz | |
cpu: Move packet deallocation to recvTimingResp in the O3 CPU
Move the packet deallocations in the O3 CPU so that the completeDataAccess
deals only with the LSQ specific parts and the generic recvTimingResp frees the
packet in all other cases.
Diffstat (limited to 'src/cpu/o3/lsq_impl.hh')
| -rw-r--r-- | src/cpu/o3/lsq_impl.hh | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/cpu/o3/lsq_impl.hh b/src/cpu/o3/lsq_impl.hh index 5d50b98ea..2c9c6eb82 100644 --- a/src/cpu/o3/lsq_impl.hh +++ b/src/cpu/o3/lsq_impl.hh @@ -347,6 +347,8 @@ LSQ<Impl>::recvTimingResp(PacketPtr pkt) DPRINTF(LSQ, "Got error packet back for address: %#X\n", pkt->getAddr()); thread[pkt->req->threadId()].completeDataAccess(pkt); + delete pkt->req; + delete pkt; return true; } |