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authorKevin Lim <ktlim@umich.edu>2008-09-26 07:44:07 -0700
committerKevin Lim <ktlim@umich.edu>2008-09-26 07:44:07 -0700
commitb7849032072ed7e93979d625cade3b384aa19948 (patch)
treecf8f9578c9cc9b77cd99606875a366f1f303dad9 /src/cpu/o3/lsq_impl.hh
parent712a8ee70090abc8c8c0fdb4a907e3ec419ae56e (diff)
downloadgem5-b7849032072ed7e93979d625cade3b384aa19948.tar.xz
O3CPU: Fix thread writeback logic.
Fix the logic in the LSQ that determines if there are any stores to write back. In the commit stage, check for thread specific writebacks instead of just any writeback.
Diffstat (limited to 'src/cpu/o3/lsq_impl.hh')
-rw-r--r--src/cpu/o3/lsq_impl.hh15
1 files changed, 6 insertions, 9 deletions
diff --git a/src/cpu/o3/lsq_impl.hh b/src/cpu/o3/lsq_impl.hh
index f8e77b64e..5aea020a9 100644
--- a/src/cpu/o3/lsq_impl.hh
+++ b/src/cpu/o3/lsq_impl.hh
@@ -584,17 +584,14 @@ LSQ<Impl>::hasStoresToWB()
std::list<unsigned>::iterator threads = activeThreads->begin();
std::list<unsigned>::iterator end = activeThreads->end();
- if (threads == end)
- return false;
-
while (threads != end) {
unsigned tid = *threads++;
- if (!hasStoresToWB(tid))
- return false;
+ if (hasStoresToWB(tid))
+ return true;
}
- return true;
+ return false;
}
template<class Impl>
@@ -607,11 +604,11 @@ LSQ<Impl>::willWB()
while (threads != end) {
unsigned tid = *threads++;
- if (!willWB(tid))
- return false;
+ if (willWB(tid))
+ return true;
}
- return true;
+ return false;
}
template<class Impl>