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| author | Andreas Sandberg <andreas.sandberg@arm.com> | 2016-04-06 19:43:31 +0100 |
|---|---|---|
| committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2016-04-06 19:43:31 +0100 |
| commit | be28d96510e0e722db83b26f1a12d3f5de979b32 (patch) | |
| tree | 6a7e1807397f002f51fddb34568b89250fca45c8 /src/cpu/o3/lsq_impl.hh | |
| parent | 8615b27174ae06db4665016c877b1e88031af203 (diff) | |
| download | gem5-be28d96510e0e722db83b26f1a12d3f5de979b32.tar.xz | |
Revert power patch sets with unexpected interactions
The following patches had unexpected interactions with the current
upstream code and have been reverted for now:
e07fd01651f3: power: Add support for power models
831c7f2f9e39: power: Low-power idle power state for idle CPUs
4f749e00b667: power: Add power states to ClockedObject
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
--HG--
extra : amend_source : 0b6fb073c6bbc24be533ec431eb51fbf1b269508
Diffstat (limited to 'src/cpu/o3/lsq_impl.hh')
| -rw-r--r-- | src/cpu/o3/lsq_impl.hh | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/cpu/o3/lsq_impl.hh b/src/cpu/o3/lsq_impl.hh index 9080907fe..06467243d 100644 --- a/src/cpu/o3/lsq_impl.hh +++ b/src/cpu/o3/lsq_impl.hh @@ -347,8 +347,7 @@ LSQ<Impl>::recvTimingResp(PacketPtr pkt) DPRINTF(LSQ, "Got error packet back for address: %#X\n", pkt->getAddr()); - thread[cpu->contextToThread(pkt->req->contextId())] - .completeDataAccess(pkt); + thread[pkt->req->threadId()].completeDataAccess(pkt); if (pkt->isInvalidate()) { // This response also contains an invalidate; e.g. this can be the case |