o3: split load & store queue full cases in rename

Check for free entries in Load Queue and Store Queue separately to
avoid cases when load cannot be renamed due to full Store Queue and
vice versa.

This work was done while Binh was an intern at AMD Research.

1 files changed, 17 insertions, 11 deletions

diff --git a/src/cpu/o3/lsq_unit_impl.hh b/src/cpu/o3/lsq_unit_impl.hh
index 547800b4c..e6bb560af 100644
--- a/src/cpu/o3/lsq_unit_impl.hh
+++ b/src/cpu/o3/lsq_unit_impl.hh
@@ -1,6 +1,7 @@
 
 /*
  * Copyright (c) 2010-2013 ARM Limited
+ * Copyright (c) 2013 Advanced Micro Devices, Inc.
  * All rights reserved
  *
  * The license below extends only to copyright in the software and shall
@@ -414,21 +415,26 @@ LSQUnit<Impl>::getMemDepViolator()
 
 template <class Impl>
 unsigned
-LSQUnit<Impl>::numFreeEntries()
+LSQUnit<Impl>::numFreeLoadEntries()
 {
-    unsigned free_lq_entries = LQEntries - loads;
-    unsigned free_sq_entries = SQEntries - stores;
-
-    // Both the LQ and SQ entries have an extra dummy entry to differentiate
-    // empty/full conditions.  Subtract 1 from the free entries.
-    if (free_lq_entries < free_sq_entries) {
-        return free_lq_entries - 1;
-    } else {
-        return free_sq_entries - 1;
-    }
+        //LQ has an extra dummy entry to differentiate
+        //empty/full conditions. Subtract 1 from the free entries.
+        DPRINTF(LSQUnit, "LQ size: %d, #loads occupied: %d\n", LQEntries, loads);
+        return LQEntries - loads - 1;
 }
 
 template <class Impl>
+unsigned
+LSQUnit<Impl>::numFreeStoreEntries()
+{
+        //SQ has an extra dummy entry to differentiate
+        //empty/full conditions. Subtract 1 from the free entries.
+        DPRINTF(LSQUnit, "SQ size: %d, #stores occupied: %d\n", SQEntries, stores);
+        return SQEntries - stores - 1;
+
+ }
+
+template <class Impl>
 void
 LSQUnit<Impl>::checkSnoop(PacketPtr pkt)
 {