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| author | Matt Horsnell <Matt.Horsnell@arm.com> | 2011-01-18 16:30:05 -0600 |
|---|---|---|
| committer | Matt Horsnell <Matt.Horsnell@arm.com> | 2011-01-18 16:30:05 -0600 |
| commit | 11bef2ab3811e5c7a65d33ba86718d8c606be87a (patch) | |
| tree | 8b68f92755f6ffe2a6f3b5e57ea78a14fcb41e47 /src/cpu/o3/lsq_unit_impl.hh | |
| parent | 62f2097917c977335d025e230146c6eb56a9bb5d (diff) | |
| download | gem5-11bef2ab3811e5c7a65d33ba86718d8c606be87a.tar.xz | |
O3: Fix corner cases where multiple squashes/fetch redirects overwrite timebuf.
Diffstat (limited to 'src/cpu/o3/lsq_unit_impl.hh')
| -rw-r--r-- | src/cpu/o3/lsq_unit_impl.hh | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/o3/lsq_unit_impl.hh b/src/cpu/o3/lsq_unit_impl.hh index 7be5e4e5b..dd3604ffe 100644 --- a/src/cpu/o3/lsq_unit_impl.hh +++ b/src/cpu/o3/lsq_unit_impl.hh @@ -90,8 +90,8 @@ LSQUnit<Impl>::completeDataAccess(PacketPtr pkt) { LSQSenderState *state = dynamic_cast<LSQSenderState *>(pkt->senderState); DynInstPtr inst = state->inst; - DPRINTF(IEW, "Writeback event [sn:%lli]\n", inst->seqNum); - DPRINTF(Activity, "Activity: Writeback event [sn:%lli]\n", inst->seqNum); + DPRINTF(IEW, "Writeback event [sn:%lli].\n", inst->seqNum); + DPRINTF(Activity, "Activity: Writeback event [sn:%lli].\n", inst->seqNum); //iewStage->ldstQueue.removeMSHR(inst->threadNumber,inst->seqNum); |