track instruction after tainted branches

1 files changed, 11 insertions, 1 deletions

diff --git a/src/cpu/o3/lsq_unit_impl.hh b/src/cpu/o3/lsq_unit_impl.hh
index 79d913175..a45048ff9 100644
--- a/src/cpu/o3/lsq_unit_impl.hh
+++ b/src/cpu/o3/lsq_unit_impl.hh
@@ -1059,7 +1059,17 @@ LSQUnit<Impl>::updateVisibleState()
                   /* if the load depends on tainted registers, set
                      readyToExpose to false, otherwise set it to true
                   */
-                  bool doSpecLoad = inst->needPostFetch() || inst->srcTainted();
+                  bool doSpecLoad = false;
+                  if (inst->needPostFetch()) {
+                      doSpecLoad = true;
+                      DPRINTF(LSQUnit, "load inst [sn:%lli] %s needs post fetch.\n", inst->seqNum, inst->pcState());
+                  } else if (inst->afterTaintedBranch) {
+                      doSpecLoad = true;
+                      DPRINTF(LSQUnit, "load inst [sn:%lli] %s is after a tainted branch.\n", inst->seqNum, inst->pcState());
+                  } else if (inst->srcTainted()) {
+                      doSpecLoad = true;
+                      DPRINTF(LSQUnit, "source registers of load inst [sn:%lli] %s is tainted.\n", inst->seqNum, inst->pcState());
+                  }
                   if (doSpecLoad) {
                     DPRINTF(LSQUnit, "load inst [sn:%lli] %s not safe, set readyToExpose to false\n", inst->seqNum, inst->pcState());
                     inst->readyToExpose(false);