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| author | Andreas Hansson <andreas.hansson@arm.com> | 2014-03-23 11:12:14 -0400 |
|---|---|---|
| committer | Andreas Hansson <andreas.hansson@arm.com> | 2014-03-23 11:12:14 -0400 |
| commit | a00383a40aeb8347af7e05f3966ab141484921a5 (patch) | |
| tree | 606791537a5ecb3b8f349ca65cfd57bce9077327 /src/cpu/o3/lsq_unit_impl.hh | |
| parent | 7c18691db1bc450b04142502e5c324ad612318ab (diff) | |
| download | gem5-a00383a40aeb8347af7e05f3966ab141484921a5.tar.xz | |
mem: Track DRAM read/write switching and add hysteresis
This patch adds stats for tracking the number of reads/writes per bus
turn around, and also adds hysteresis to the write-to-read switching
to ensure that the queue does not oscilate around the low threshold.
Diffstat (limited to 'src/cpu/o3/lsq_unit_impl.hh')
0 files changed, 0 insertions, 0 deletions