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| author | Iru Cai <mytbk920423@gmail.com> | 2019-04-08 10:42:39 +0800 |
|---|---|---|
| committer | Iru Cai <mytbk920423@gmail.com> | 2019-04-08 10:42:39 +0800 |
| commit | b6141109804bf4637345d5b8079c9a6debee285c (patch) | |
| tree | 95d82200a859dfdffba48100854818380065666c /src/cpu/o3/lsq_unit_impl.hh | |
| parent | f76b874533045543e56a69c1b5d75b34fbc8a888 (diff) | |
| download | gem5-b6141109804bf4637345d5b8079c9a6debee285c.tar.xz | |
implement taint propagation
Diffstat (limited to 'src/cpu/o3/lsq_unit_impl.hh')
| -rw-r--r-- | src/cpu/o3/lsq_unit_impl.hh | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/o3/lsq_unit_impl.hh b/src/cpu/o3/lsq_unit_impl.hh index 14256e382..3edbe4761 100644 --- a/src/cpu/o3/lsq_unit_impl.hh +++ b/src/cpu/o3/lsq_unit_impl.hh @@ -1053,7 +1053,7 @@ LSQUnit<Impl>::updateVisibleState() } #endif /* set taint for dst registers */ - inst->taintDestRegs(); + inst->taintDestRegs(true); /* if the load depends on tainted registers, set readyToExpose to false, otherwise set it to true */ |