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| author | Iru Cai <mytbk920423@gmail.com> | 2019-04-08 10:42:39 +0800 |
|---|---|---|
| committer | Iru Cai <mytbk920423@gmail.com> | 2019-05-31 15:59:17 +0800 |
| commit | 57eb50e414a3aaa6e8bc96ae158af55246cb6754 (patch) | |
| tree | 9d7c2d4a2598ae916d3976e6dbcc739c6b16fb59 /src/cpu/o3/lsq_unit_impl.hh | |
| parent | c0d7cca1d9895f1c3476ce9864584eb4fb2e6ee9 (diff) | |
| download | gem5-57eb50e414a3aaa6e8bc96ae158af55246cb6754.tar.xz | |
implement taint propagation
Diffstat (limited to 'src/cpu/o3/lsq_unit_impl.hh')
| -rw-r--r-- | src/cpu/o3/lsq_unit_impl.hh | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/o3/lsq_unit_impl.hh b/src/cpu/o3/lsq_unit_impl.hh index 14256e382..3edbe4761 100644 --- a/src/cpu/o3/lsq_unit_impl.hh +++ b/src/cpu/o3/lsq_unit_impl.hh @@ -1053,7 +1053,7 @@ LSQUnit<Impl>::updateVisibleState() } #endif /* set taint for dst registers */ - inst->taintDestRegs(); + inst->taintDestRegs(true); /* if the load depends on tainted registers, set readyToExpose to false, otherwise set it to true */ |