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authorMin Kyu Jeong <minkyu.jeong@arm.com>2010-08-23 11:18:41 -0500
committerMin Kyu Jeong <minkyu.jeong@arm.com>2010-08-23 11:18:41 -0500
commit03286e9d4e797c7ca824a72627a947a42e01795f (patch)
tree6c873877ad9e5af85dcb7d319570c47d2622ad41 /src/cpu/o3/lsq_unit_impl.hh
parent92ae620be8b46742042dcfe6dfaf38ecac24ad09 (diff)
downloadgem5-03286e9d4e797c7ca824a72627a947a42e01795f.tar.xz
CPU: Make Exec trace to print predication result (if false) for memory instructions
Diffstat (limited to 'src/cpu/o3/lsq_unit_impl.hh')
-rw-r--r--src/cpu/o3/lsq_unit_impl.hh3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/cpu/o3/lsq_unit_impl.hh b/src/cpu/o3/lsq_unit_impl.hh
index 9e6bbe92f..7330ba2ef 100644
--- a/src/cpu/o3/lsq_unit_impl.hh
+++ b/src/cpu/o3/lsq_unit_impl.hh
@@ -458,6 +458,9 @@ LSQUnit<Impl>::executeLoad(DynInstPtr &inst)
// realizes there is activity.
// Mark it as executed unless it is an uncached load that
// needs to hit the head of commit.
+ DPRINTF(LSQUnit, "Load [sn:%lli] not executed from %s\n",
+ inst->seqNum,
+ (load_fault != NoFault ? "fault" : "predication"));
if (!(inst->hasRequest() && inst->uncacheable()) ||
inst->isAtCommit()) {
inst->setExecuted();