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author | Gabe Black <gblack@eecs.umich.edu> | 2007-04-08 01:42:42 +0000 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2007-04-08 01:42:42 +0000 |
commit | 3bb5fd8c44bbac6cbcfd18aed5fd46c112d19d7f (patch) | |
tree | d1fdb51884273fe9aa826312597f7f874d8f7c10 /src/cpu/o3/lsq_unit_impl.hh | |
parent | 3c9768e6448b72689e9edb250dd0ee3e5eadb9d7 (diff) | |
download | gem5-3bb5fd8c44bbac6cbcfd18aed5fd46c112d19d7f.tar.xz |
Get the "hard" SPARC instructions working in o3. I don't like that the IsStoreConditional flag needs to be set for them because they aren't store conditional instructions, and I should fix the format code which is not handling the opt_flags correctly.
--HG--
extra : convert_revision : cfd32808592832d7b6fbdaace5ae7b17c8a246e9
Diffstat (limited to 'src/cpu/o3/lsq_unit_impl.hh')
-rw-r--r-- | src/cpu/o3/lsq_unit_impl.hh | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/cpu/o3/lsq_unit_impl.hh b/src/cpu/o3/lsq_unit_impl.hh index d558e2dfa..44e2cea76 100644 --- a/src/cpu/o3/lsq_unit_impl.hh +++ b/src/cpu/o3/lsq_unit_impl.hh @@ -647,7 +647,8 @@ LSQUnit<Impl>::writebackStores() memcpy(inst->memData, storeQueue[storeWBIdx].data, req->getSize()); - PacketPtr data_pkt = new Packet(req, MemCmd::WriteReq, + MemCmd command = req->isSwap() ? MemCmd::SwapReq : MemCmd::WriteReq; + PacketPtr data_pkt = new Packet(req, command, Packet::Broadcast); data_pkt->dataStatic(inst->memData); @@ -664,7 +665,7 @@ LSQUnit<Impl>::writebackStores() inst->seqNum); // @todo: Remove this SC hack once the memory system handles it. - if (req->isLocked()) { + if (inst->isStoreConditional()) { // Disable recording the result temporarily. Writing to // misc regs normally updates the result, but this is not // the desired behavior when handling store conditionals. |