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authorKevin Lim <ktlim@umich.edu>2006-07-19 15:28:02 -0400
committerKevin Lim <ktlim@umich.edu>2006-07-19 15:28:02 -0400
commit85515c4976532e0057a56a16cd53367bb6d0bbdb (patch)
tree908a533186d387c1cc6207e867e060054845bc24 /src/cpu/o3/lsq_unit_impl.hh
parent0cedb23d3c9122c061c5c1837dfaf01f570e0733 (diff)
downloadgem5-85515c4976532e0057a56a16cd53367bb6d0bbdb.tar.xz
O3CPU fixes.
src/cpu/o3/lsq_unit.hh: LSQ needs to decrement the WB counter if the load is going to be replayed. src/cpu/o3/lsq_unit_impl.hh: LSQ needs to decrement the WB counter if the load is squashed. --HG-- extra : convert_revision : 20a10baf0d6ab46065e561ddba231251865ebdbd
Diffstat (limited to 'src/cpu/o3/lsq_unit_impl.hh')
-rw-r--r--src/cpu/o3/lsq_unit_impl.hh1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/cpu/o3/lsq_unit_impl.hh b/src/cpu/o3/lsq_unit_impl.hh
index 85b150cd9..4f5dbbf1c 100644
--- a/src/cpu/o3/lsq_unit_impl.hh
+++ b/src/cpu/o3/lsq_unit_impl.hh
@@ -790,6 +790,7 @@ LSQUnit<Impl>::writeback(DynInstPtr &inst, PacketPtr pkt)
// Squashed instructions do not need to complete their access.
if (inst->isSquashed()) {
+ iewStage->decrWb(inst->seqNum);
assert(!inst->isStore());
++lsqIgnoredResponses;
return;