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author | Rekai Gonzalez-Alberquilla <rekai.gonzalezalberquilla@arm.com> | 2017-02-06 11:10:06 +0000 |
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committer | Giacomo Gabrielli <giacomo.gabrielli@arm.com> | 2018-11-16 10:39:03 +0000 |
commit | 0c50a0b4fe3956f9d2e08e75d47c9cbd79bf0268 (patch) | |
tree | 7679abe2343e0504c93eb73d09635d546a211455 /src/cpu/o3/lsq_unit_impl.hh | |
parent | 338a173e822298bd22741342a7b24352450afdd1 (diff) | |
download | gem5-0c50a0b4fe3956f9d2e08e75d47c9cbd79bf0268.tar.xz |
cpu: Fix the usage of const DynInstPtr
Summary: Usage of const DynInstPtr& when possible and introduction of
move operators to RefCountingPtr.
In many places, scoped references to dynamic instructions do a copy of
the DynInstPtr when a reference would do. This is detrimental to
performance. On top of that, in case there is a need for reference
tracking for debugging, the redundant copies make the process much more
painful than it already is.
Also, from the theoretical point of view, a function/method that
defines a convenience name to access an instruction should not be
considered an owner of the data, i.e., doing a copy and not a reference
is not justified.
On a related topic, C++11 introduces move semantics, and those are
useful when, for example, there is a class modelling a HW structure that
contains a list, and has a getHeadOfList function, to prevent doing a
copy to an internal variable -> update pointer, remove from the list ->
update pointer, return value making a copy to the assined variable ->
update pointer, destroy the returned value -> update pointer.
Change-Id: I3bb46c20ef23b6873b469fd22befb251ac44d2f6
Signed-off-by: Giacomo Gabrielli <giacomo.gabrielli@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/13105
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'src/cpu/o3/lsq_unit_impl.hh')
-rw-r--r-- | src/cpu/o3/lsq_unit_impl.hh | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/src/cpu/o3/lsq_unit_impl.hh b/src/cpu/o3/lsq_unit_impl.hh index c2750be7d..d8f1c39c6 100644 --- a/src/cpu/o3/lsq_unit_impl.hh +++ b/src/cpu/o3/lsq_unit_impl.hh @@ -61,8 +61,8 @@ #include "mem/request.hh" template<class Impl> -LSQUnit<Impl>::WritebackEvent::WritebackEvent(DynInstPtr &_inst, PacketPtr _pkt, - LSQUnit *lsq_ptr) +LSQUnit<Impl>::WritebackEvent::WritebackEvent(const DynInstPtr &_inst, + PacketPtr _pkt, LSQUnit *lsq_ptr) : Event(Default_Pri, AutoDelete), inst(_inst), pkt(_pkt), lsqPtr(lsq_ptr) { @@ -339,7 +339,7 @@ LSQUnit<Impl>::resizeSQ(unsigned size) template <class Impl> void -LSQUnit<Impl>::insert(DynInstPtr &inst) +LSQUnit<Impl>::insert(const DynInstPtr &inst) { assert(inst->isMemRef()); @@ -356,7 +356,7 @@ LSQUnit<Impl>::insert(DynInstPtr &inst) template <class Impl> void -LSQUnit<Impl>::insertLoad(DynInstPtr &load_inst) +LSQUnit<Impl>::insertLoad(const DynInstPtr &load_inst) { assert((loadTail + 1) % LQEntries != loadHead); assert(loads < LQEntries); @@ -381,7 +381,7 @@ LSQUnit<Impl>::insertLoad(DynInstPtr &load_inst) template <class Impl> void -LSQUnit<Impl>::insertStore(DynInstPtr &store_inst) +LSQUnit<Impl>::insertStore(const DynInstPtr &store_inst) { // Make sure it is not full before inserting an instruction. assert((storeTail + 1) % SQEntries != storeHead); @@ -525,7 +525,7 @@ LSQUnit<Impl>::checkSnoop(PacketPtr pkt) template <class Impl> Fault -LSQUnit<Impl>::checkViolations(int load_idx, DynInstPtr &inst) +LSQUnit<Impl>::checkViolations(int load_idx, const DynInstPtr &inst) { Addr inst_eff_addr1 = inst->effAddr >> depCheckShift; Addr inst_eff_addr2 = (inst->effAddr + inst->effSize - 1) >> depCheckShift; @@ -605,7 +605,7 @@ LSQUnit<Impl>::checkViolations(int load_idx, DynInstPtr &inst) template <class Impl> Fault -LSQUnit<Impl>::executeLoad(DynInstPtr &inst) +LSQUnit<Impl>::executeLoad(const DynInstPtr &inst) { using namespace TheISA; // Execute a specific load. @@ -654,7 +654,7 @@ LSQUnit<Impl>::executeLoad(DynInstPtr &inst) template <class Impl> Fault -LSQUnit<Impl>::executeStore(DynInstPtr &store_inst) +LSQUnit<Impl>::executeStore(const DynInstPtr &store_inst) { using namespace TheISA; // Make sure that a store exists. @@ -1105,7 +1105,7 @@ LSQUnit<Impl>::storePostSend(PacketPtr pkt) template <class Impl> void -LSQUnit<Impl>::writeback(DynInstPtr &inst, PacketPtr pkt) +LSQUnit<Impl>::writeback(const DynInstPtr &inst, PacketPtr pkt) { iewStage->wakeCPU(); |