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| author | Gabe Black <gblack@eecs.umich.edu> | 2007-04-09 07:59:57 +0000 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-04-09 07:59:57 +0000 |
| commit | f53d2ccbfc63f1a7de13f7772e72814b4f94f47a (patch) | |
| tree | fa04e9a6796153a5139731e332648c4250db1dfe /src/cpu/o3/lsq_unit_impl.hh | |
| parent | 85f9213b8ae93a1cf9c712415668efb2d053638b (diff) | |
| parent | 97e8111b465c96e6e103fc6549f8921ca0f74da3 (diff) | |
| download | gem5-f53d2ccbfc63f1a7de13f7772e72814b4f94f47a.tar.xz | |
Merge zizzer.eecs.umich.edu:/bk/newmem
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : 1396ed5b264d29377ef9793a763225a93181f65f
Diffstat (limited to 'src/cpu/o3/lsq_unit_impl.hh')
| -rw-r--r-- | src/cpu/o3/lsq_unit_impl.hh | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/cpu/o3/lsq_unit_impl.hh b/src/cpu/o3/lsq_unit_impl.hh index d558e2dfa..44e2cea76 100644 --- a/src/cpu/o3/lsq_unit_impl.hh +++ b/src/cpu/o3/lsq_unit_impl.hh @@ -647,7 +647,8 @@ LSQUnit<Impl>::writebackStores() memcpy(inst->memData, storeQueue[storeWBIdx].data, req->getSize()); - PacketPtr data_pkt = new Packet(req, MemCmd::WriteReq, + MemCmd command = req->isSwap() ? MemCmd::SwapReq : MemCmd::WriteReq; + PacketPtr data_pkt = new Packet(req, command, Packet::Broadcast); data_pkt->dataStatic(inst->memData); @@ -664,7 +665,7 @@ LSQUnit<Impl>::writebackStores() inst->seqNum); // @todo: Remove this SC hack once the memory system handles it. - if (req->isLocked()) { + if (inst->isStoreConditional()) { // Disable recording the result temporarily. Writing to // misc regs normally updates the result, but this is not // the desired behavior when handling store conditionals. |