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authorKevin Lim <ktlim@umich.edu>2006-11-02 15:20:37 -0500
committerKevin Lim <ktlim@umich.edu>2006-11-02 15:20:37 -0500
commit45363ea658251df0c31a75d7bd5d0ac3a3809623 (patch)
treebae91271cf1e57d6cacbf0bbe4853f0db0067797 /src/cpu/o3/mem_dep_unit.hh
parentc3485a654888f641dca23128f8197ef747c706d2 (diff)
downloadgem5-45363ea658251df0c31a75d7bd5d0ac3a3809623.tar.xz
Have bus use the BadAddress device to handle bad addresses. The O3 CPU should be able to boot into Linux with caches on after this change.
src/mem/bus.cc: src/mem/bus.hh: Bus now will be setup with a default responder, unless the user overrides it. This default responder should return BadAddress if no matching port is found. src/python/m5/objects/Bus.py: Bus now has a default responder for FS mode if the user doesn't override it. It returns BadAddress if no matching port is found. src/python/m5/objects/Tsunami.py: Add bad address device. Also record when the user has specified their own default responder. --HG-- extra : convert_revision : 59070477ae313ee711b2d59baa2369c9a91c5b85
Diffstat (limited to 'src/cpu/o3/mem_dep_unit.hh')
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