diff options
author | Gabe Black <gblack@eecs.umich.edu> | 2006-08-15 05:07:15 -0400 |
---|---|---|
committer | Gabe Black <gblack@eecs.umich.edu> | 2006-08-15 05:07:15 -0400 |
commit | 74546aac0124a5ba09a0e6bfef18dc3e0b7509b8 (patch) | |
tree | 367e2fbfa58d670c2a91076f080c998e69f4eeb6 /src/cpu/o3/mips/cpu_impl.hh | |
parent | 741bc40cc336be6afdff73a230eaec980812b7d5 (diff) | |
download | gem5-74546aac0124a5ba09a0e6bfef18dc3e0b7509b8.tar.xz |
Cleaned up include files and got rid of many using directives in header files.
--HG--
extra : convert_revision : 6b11e039cbc061dab75195fa1aebe6ca2cdc6f91
Diffstat (limited to 'src/cpu/o3/mips/cpu_impl.hh')
-rw-r--r-- | src/cpu/o3/mips/cpu_impl.hh | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/src/cpu/o3/mips/cpu_impl.hh b/src/cpu/o3/mips/cpu_impl.hh index 72b64943b..e08741626 100644 --- a/src/cpu/o3/mips/cpu_impl.hh +++ b/src/cpu/o3/mips/cpu_impl.hh @@ -45,8 +45,6 @@ #include "cpu/o3/comm.hh" #include "cpu/o3/thread_state.hh" -using namespace TheISA; - template <class Impl> MipsO3CPU<Impl>::MipsO3CPU(Params *params) : FullO3CPU<Impl>(params) @@ -240,12 +238,13 @@ MipsO3CPU<Impl>::setSyscallReturn(SyscallReturn return_value, int tid) // check for error condition. if (return_value.successful()) { // no error - this->setArchIntReg(SyscallSuccessReg, 0, tid); - this->setArchIntReg(ReturnValueReg, return_value.value(), tid); + this->setArchIntReg(TheISA::SyscallSuccessReg, 0, tid); + this->setArchIntReg(TheISA::ReturnValueReg, return_value.value(), tid); } else { // got an error, return details - this->setArchIntReg(SyscallSuccessReg, (IntReg) -1, tid); - this->setArchIntReg(ReturnValueReg, -return_value.value(), tid); + this->setArchIntReg(TheISA::SyscallSuccessReg, + (TheISA::IntReg) -1, tid); + this->setArchIntReg(TheISA::ReturnValueReg, -return_value.value(), tid); } } #endif |