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| author | Nathan Binkert <nate@binkert.org> | 2007-07-26 23:15:49 -0700 |
|---|---|---|
| committer | Nathan Binkert <nate@binkert.org> | 2007-07-26 23:15:49 -0700 |
| commit | f0fef8f850b0c5aa73337ca11b26169163b2b2e1 (patch) | |
| tree | d49d3492618ee85717554cddbe62cba1b5e7fb9c /src/cpu/o3/mips/cpu_impl.hh | |
| parent | 6b73ff43ff58502c80050c7aeff5a08a4ce61f87 (diff) | |
| parent | cda354b07035f73a3b220f89014721300d36a815 (diff) | |
| download | gem5-f0fef8f850b0c5aa73337ca11b26169163b2b2e1.tar.xz | |
Merge python and x86 changes with cache branch
--HG--
extra : convert_revision : e06a950964286604274fba81dcca362d75847233
Diffstat (limited to 'src/cpu/o3/mips/cpu_impl.hh')
| -rw-r--r-- | src/cpu/o3/mips/cpu_impl.hh | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/cpu/o3/mips/cpu_impl.hh b/src/cpu/o3/mips/cpu_impl.hh index d1135f048..09d73b4a2 100644 --- a/src/cpu/o3/mips/cpu_impl.hh +++ b/src/cpu/o3/mips/cpu_impl.hh @@ -196,14 +196,16 @@ template <class Impl> TheISA::IntReg MipsO3CPU<Impl>::getSyscallArg(int i, int tid) { - return this->readArchIntReg(MipsISA::ArgumentReg0 + i, tid); + assert(i < TheISA::NumArgumentRegs); + return this->readArchIntReg(MipsISA::ArgumentReg[i], tid); } template <class Impl> void MipsO3CPU<Impl>::setSyscallArg(int i, IntReg val, int tid) { - this->setArchIntReg(MipsISA::ArgumentReg0 + i, val, tid); + assert(i < TheISA::NumArgumentRegs); + this->setArchIntReg(MipsISA::ArgumentReg[i], val, tid); } template <class Impl> |