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| author | Radhika Jagtap <radhika.jagtap@ARM.com> | 2015-12-07 16:42:16 -0600 |
|---|---|---|
| committer | Radhika Jagtap <radhika.jagtap@ARM.com> | 2015-12-07 16:42:16 -0600 |
| commit | 54519fd51f739c3a37c4ad712b86a353eabbbfec (patch) | |
| tree | 21002ebffe820d302b839ac625636830b141964b /src/cpu/o3/probe/ElasticTrace.py | |
| parent | 3080bbcc365e6ed663787a4c06cd2b7c4a118d47 (diff) | |
| download | gem5-54519fd51f739c3a37c4ad712b86a353eabbbfec.tar.xz | |
cpu: Support virtual addr in elastic traces
This patch adds support to optionally capture the virtual address and asid
for load/store instructions in the elastic traces. If they are present in
the traces, Trace CPU will set those fields of the request during replay.
Diffstat (limited to 'src/cpu/o3/probe/ElasticTrace.py')
| -rw-r--r-- | src/cpu/o3/probe/ElasticTrace.py | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/cpu/o3/probe/ElasticTrace.py b/src/cpu/o3/probe/ElasticTrace.py index fb3093a2c..20057ab97 100644 --- a/src/cpu/o3/probe/ElasticTrace.py +++ b/src/cpu/o3/probe/ElasticTrace.py @@ -59,4 +59,6 @@ class ElasticTrace(ProbeListenerObject): "after which to start tracing. Default " \ "zero means start tracing from first " \ "committed instruction.") - + # Whether to trace virtual addresses for memory accesses + traceVirtAddr = Param.Bool(False, "Set to true if virtual addresses are " \ + "to be traced.") |