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author | Nilay Vaish <nilay@cs.wisc.edu> | 2015-07-28 01:58:04 -0500 |
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committer | Nilay Vaish <nilay@cs.wisc.edu> | 2015-07-28 01:58:04 -0500 |
commit | aafa5c3f86ea54f5e6e88009be656aeec12eef5f (patch) | |
tree | d40f2fd8a807ddc9638f292205754f9ecf19b6ef /src/cpu/o3/regfile.cc | |
parent | 608641e23c7f2288810c3f23a1a63790b664f2ab (diff) | |
download | gem5-aafa5c3f86ea54f5e6e88009be656aeec12eef5f.tar.xz |
revert 5af8f40d8f2c
Diffstat (limited to 'src/cpu/o3/regfile.cc')
-rw-r--r-- | src/cpu/o3/regfile.cc | 26 |
1 files changed, 4 insertions, 22 deletions
diff --git a/src/cpu/o3/regfile.cc b/src/cpu/o3/regfile.cc index a7476c5ec..96ce44bdd 100644 --- a/src/cpu/o3/regfile.cc +++ b/src/cpu/o3/regfile.cc @@ -37,20 +37,15 @@ PhysRegFile::PhysRegFile(unsigned _numPhysicalIntRegs, unsigned _numPhysicalFloatRegs, - unsigned _numPhysicalCCRegs, - unsigned _numPhysicalVectorRegs) + unsigned _numPhysicalCCRegs) : intRegFile(_numPhysicalIntRegs), floatRegFile(_numPhysicalFloatRegs), ccRegFile(_numPhysicalCCRegs), - vectorRegFile(_numPhysicalVectorRegs), baseFloatRegIndex(_numPhysicalIntRegs), baseCCRegIndex(_numPhysicalIntRegs + _numPhysicalFloatRegs), - baseVectorRegIndex(_numPhysicalIntRegs + _numPhysicalFloatRegs - + _numPhysicalCCRegs), totalNumRegs(_numPhysicalIntRegs + _numPhysicalFloatRegs - + _numPhysicalCCRegs - + _numPhysicalVectorRegs) + + _numPhysicalCCRegs) { if (TheISA::NumCCRegs == 0 && _numPhysicalCCRegs != 0) { // Just make this a warning and go ahead and allocate them @@ -58,13 +53,6 @@ PhysRegFile::PhysRegFile(unsigned _numPhysicalIntRegs, warn("Non-zero number of physical CC regs specified, even though\n" " ISA does not use them.\n"); } - - if (TheISA::NumVectorRegs == 0 && _numPhysicalVectorRegs != 0) { - // Just make this a warning and go ahead and allocate them - // anyway, to keep from having to add checks everywhere - warn("Non-zero number of physical vector regs specified, even though\n" - " ISA does not use them.\n"); - } } @@ -85,15 +73,9 @@ PhysRegFile::initFreeList(UnifiedFreeList *freeList) freeList->addFloatReg(reg_idx++); } - // The next batch of registers are the condition-code physical + // The rest of the registers are the condition-code physical // registers; put them onto the condition-code free list. - while (reg_idx < baseVectorRegIndex) { - freeList->addCCReg(reg_idx++); - } - - // The rest of the registers are the vector physical - // registers; put them onto the vector free list. while (reg_idx < totalNumRegs) { - freeList->addVectorReg(reg_idx++); + freeList->addCCReg(reg_idx++); } } |