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author | Yasuko Eckert <yasuko.eckert@amd.com> | 2013-10-15 14:22:44 -0400 |
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committer | Yasuko Eckert <yasuko.eckert@amd.com> | 2013-10-15 14:22:44 -0400 |
commit | 2c293823aa7cb6d2cac4c0ff35e2023ff132a8f2 (patch) | |
tree | 040fdd5bad814d7cb7ee40934974d2b38b28d67a /src/cpu/o3/regfile.cc | |
parent | 552622184752dc798bc81f9b0b395db68aee9511 (diff) | |
download | gem5-2c293823aa7cb6d2cac4c0ff35e2023ff132a8f2.tar.xz |
cpu: add a condition-code register class
Add a third register class for condition codes,
in parallel with the integer and FP classes.
No ISAs use the CC class at this point though.
Diffstat (limited to 'src/cpu/o3/regfile.cc')
-rw-r--r-- | src/cpu/o3/regfile.cc | 25 |
1 files changed, 21 insertions, 4 deletions
diff --git a/src/cpu/o3/regfile.cc b/src/cpu/o3/regfile.cc index 5ba0caefc..96ce44bdd 100644 --- a/src/cpu/o3/regfile.cc +++ b/src/cpu/o3/regfile.cc @@ -36,12 +36,23 @@ PhysRegFile::PhysRegFile(unsigned _numPhysicalIntRegs, - unsigned _numPhysicalFloatRegs) + unsigned _numPhysicalFloatRegs, + unsigned _numPhysicalCCRegs) : intRegFile(_numPhysicalIntRegs), floatRegFile(_numPhysicalFloatRegs), + ccRegFile(_numPhysicalCCRegs), baseFloatRegIndex(_numPhysicalIntRegs), - totalNumRegs(_numPhysicalIntRegs + _numPhysicalFloatRegs) + baseCCRegIndex(_numPhysicalIntRegs + _numPhysicalFloatRegs), + totalNumRegs(_numPhysicalIntRegs + + _numPhysicalFloatRegs + + _numPhysicalCCRegs) { + if (TheISA::NumCCRegs == 0 && _numPhysicalCCRegs != 0) { + // Just make this a warning and go ahead and allocate them + // anyway, to keep from having to add checks everywhere + warn("Non-zero number of physical CC regs specified, even though\n" + " ISA does not use them.\n"); + } } @@ -56,9 +67,15 @@ PhysRegFile::initFreeList(UnifiedFreeList *freeList) freeList->addIntReg(reg_idx++); } - // The rest of the registers are the floating-point physical + // The next batch of the registers are the floating-point physical // registers; put them onto the floating-point free list. - while (reg_idx < totalNumRegs) { + while (reg_idx < baseCCRegIndex) { freeList->addFloatReg(reg_idx++); } + + // The rest of the registers are the condition-code physical + // registers; put them onto the condition-code free list. + while (reg_idx < totalNumRegs) { + freeList->addCCReg(reg_idx++); + } } |