cpu: implements vector registers

This adds a vector register type.  The type is defined as a std::array of a
fixed number of uint64_ts.  The isa_parser.py has been modified to parse vector
register operands and generate the required code.  Different cpus have vector
register files now.

1 files changed, 49 insertions, 3 deletions

diff --git a/src/cpu/o3/regfile.hh b/src/cpu/o3/regfile.hh
index 8b87725ca..71ca5015f 100644
--- a/src/cpu/o3/regfile.hh
+++ b/src/cpu/o3/regfile.hh
@@ -56,6 +56,7 @@ class PhysRegFile
     typedef TheISA::FloatReg FloatReg;
     typedef TheISA::FloatRegBits FloatRegBits;
     typedef TheISA::CCReg CCReg;
+    typedef TheISA::VectorReg VectorReg;
 
     typedef union {
         FloatReg d;
@@ -71,6 +72,9 @@ class PhysRegFile
     /** Condition-code register file. */
     std::vector<CCReg> ccRegFile;
 
+    /** Vector register file. */
+    std::vector<VectorReg> vectorRegFile;
+
     /**
      * The first floating-point physical register index.  The physical
      * register file has a single continuous index space, with the
@@ -93,6 +97,12 @@ class PhysRegFile
      */
     unsigned baseCCRegIndex;
 
+    /**
+     * The first vector physical register index.  The vector registers follow
+     * the condition-code registers.
+     */
+    unsigned baseVectorRegIndex;
+
     /** Total number of physical registers. */
     unsigned totalNumRegs;
 
@@ -103,7 +113,8 @@ class PhysRegFile
      */
     PhysRegFile(unsigned _numPhysicalIntRegs,
                 unsigned _numPhysicalFloatRegs,
-                unsigned _numPhysicalCCRegs);
+                unsigned _numPhysicalCCRegs,
+                unsigned _numPhysicalVectorRegs);
 
     /**
      * Destructor to free resources
@@ -122,7 +133,11 @@ class PhysRegFile
 
     /** @return the number of condition-code physical registers. */
     unsigned numCCPhysRegs() const
-    { return totalNumRegs - baseCCRegIndex; }
+    { return baseVectorRegIndex - baseCCRegIndex; }
+
+    /** @return the number of vector physical registers. */
+    unsigned numVectorPhysRegs() const
+    { return totalNumRegs - baseVectorRegIndex; }
 
     /** @return the total number of physical registers. */
     unsigned totalNumPhysRegs() const { return totalNumRegs; }
@@ -151,7 +166,16 @@ class PhysRegFile
      */
     bool isCCPhysReg(PhysRegIndex reg_idx)
     {
-        return (baseCCRegIndex <= reg_idx && reg_idx < totalNumRegs);
+        return (baseCCRegIndex <= reg_idx && reg_idx < baseVectorRegIndex);
+    }
+
+    /**
+     * @return true if the specified physical register index
+     * corresponds to a vector physical register.
+     */
+    bool isVectorPhysReg(PhysRegIndex reg_idx) const
+    {
+        return baseVectorRegIndex <= reg_idx && reg_idx < totalNumRegs;
     }
 
     /** Reads an integer register. */
@@ -207,6 +231,18 @@ class PhysRegFile
         return ccRegFile[reg_offset];
     }
 
+    /** Reads a vector register. */
+    const VectorReg &readVectorReg(PhysRegIndex reg_idx) const
+    {
+        assert(isVectorPhysReg(reg_idx));
+
+        // Remove the base vector reg dependency.
+        PhysRegIndex reg_offset = reg_idx - baseVectorRegIndex;
+
+        DPRINTF(IEW, "RegFile: Access to vector register %i\n", int(reg_idx));
+        return vectorRegFile[reg_offset];
+    }
+
     /** Sets an integer register to the given value. */
     void setIntReg(PhysRegIndex reg_idx, uint64_t val)
     {
@@ -262,6 +298,16 @@ class PhysRegFile
 
         ccRegFile[reg_offset] = val;
     }
+
+    /** Sets a vector register to the given value. */
+    void setVectorReg(PhysRegIndex reg_idx, const VectorReg &val)
+    {
+        assert(isVectorPhysReg(reg_idx));
+        // Remove the base vector reg dependency.
+        PhysRegIndex reg_offset = reg_idx - baseVectorRegIndex;
+        DPRINTF(IEW, "RegFile: Setting vector register %i\n", int(reg_idx));
+        vectorRegFile[reg_offset] = val;
+    }
 };