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authorKevin Lim <ktlim@umich.edu>2006-07-06 17:53:26 -0400
committerKevin Lim <ktlim@umich.edu>2006-07-06 17:53:26 -0400
commite7ccc94ea3cdc6130e66899fd905ca11da958727 (patch)
tree54ba918680288ad22516b26cc6b99ad4dddb0d6b /src/cpu/o3/regfile.hh
parent8bf9709d912849a33c44cf3cd004a288d2106176 (diff)
downloadgem5-e7ccc94ea3cdc6130e66899fd905ca11da958727.tar.xz
Various serialization changes to make it possible for the O3CPU to checkpoint.
src/arch/alpha/regfile.hh: Define serialize/unserialize functions on MiscRegFile itself. src/cpu/o3/regfile.hh: Remove old commented code. src/cpu/simple_thread.cc: src/cpu/simple_thread.hh: Push common serialization code to ThreadState level. Also allow the SimpleThread to be used for checkpointing by other models. src/cpu/thread_state.cc: src/cpu/thread_state.hh: Move common serialization code into ThreadState. --HG-- extra : convert_revision : ef64ef515355437439af967eda2e610e8c1b658b
Diffstat (limited to 'src/cpu/o3/regfile.hh')
-rw-r--r--src/cpu/o3/regfile.hh4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/cpu/o3/regfile.hh b/src/cpu/o3/regfile.hh
index 6972f055f..b6677b4b1 100644
--- a/src/cpu/o3/regfile.hh
+++ b/src/cpu/o3/regfile.hh
@@ -86,10 +86,6 @@ class PhysRegFile
//The duplication is unfortunate but it's better than having
//different ways to access certain registers.
- //Add these in later when everything else is in place
-// void serialize(std::ostream &os);
-// void unserialize(Checkpoint *cp, const std::string &section);
-
/** Reads an integer register. */
uint64_t readIntReg(PhysRegIndex reg_idx)
{