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author | Nathanael Premillieu <nathanael.premillieu@arm.com> | 2017-04-05 12:46:06 -0500 |
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committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2017-07-05 14:43:49 +0000 |
commit | 43d833246fcfe092a0c08dde1fdf7e3d409d1af9 (patch) | |
tree | 650b39da3cb6e6ee0b8692032f56cc4d975a548b /src/cpu/o3/rename.hh | |
parent | 5e8287d2e2eaf058495442ea9e32fafc343a0b53 (diff) | |
download | gem5-43d833246fcfe092a0c08dde1fdf7e3d409d1af9.tar.xz |
cpu: Physical register structural + flat indexing
Mimic the changes done on the architectural register indexes on the
physical register indexes. This is specific to the O3 model. The
structure, called PhysRegId, contains a register class, a register
index and a flat register index. The flat register index is kept
because it is useful in some cases where the type of register is not
important (dependency graph and scoreboard for example). Instead
of directly using the structure, most of the code is working with
a const PhysRegId* (typedef to PhysRegIdPtr). The actual PhysRegId
objects are stored in the regFile.
Change-Id: Ic879a3cc608aa2f34e2168280faac1846de77667
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2701
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/cpu/o3/rename.hh')
-rw-r--r-- | src/cpu/o3/rename.hh | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/src/cpu/o3/rename.hh b/src/cpu/o3/rename.hh index c0483d445..ab7ae5f8b 100644 --- a/src/cpu/o3/rename.hh +++ b/src/cpu/o3/rename.hh @@ -119,7 +119,7 @@ class DefaultRename ThreadStatus renameStatus[Impl::MaxThreads]; /** Probe points. */ - typedef typename std::pair<InstSeqNum, short int> SeqNumRegPair; + typedef typename std::pair<InstSeqNum, PhysRegIdPtr> SeqNumRegPair; /** To probe when register renaming for an instruction is complete */ ProbePointArg<DynInstPtr> *ppRename; /** @@ -299,7 +299,8 @@ class DefaultRename */ struct RenameHistory { RenameHistory(InstSeqNum _instSeqNum, RegId _archReg, - PhysRegIndex _newPhysReg, PhysRegIndex _prevPhysReg) + PhysRegIdPtr _newPhysReg, + PhysRegIdPtr _prevPhysReg) : instSeqNum(_instSeqNum), archReg(_archReg), newPhysReg(_newPhysReg), prevPhysReg(_prevPhysReg) { @@ -310,9 +311,10 @@ class DefaultRename /** The architectural register index that was renamed. */ RegId archReg; /** The new physical register that the arch. register is renamed to. */ - PhysRegIndex newPhysReg; - /** The old physical register that the arch. register was renamed to. */ - PhysRegIndex prevPhysReg; + PhysRegIdPtr newPhysReg; + /** The old physical register that the arch. register was renamed to. + */ + PhysRegIdPtr prevPhysReg; }; /** A per-thread list of all destination register renames, used to either |