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| author | Rekai Gonzalez-Alberquilla <Rekai.GonzalezAlberquilla@arm.com> | 2017-04-05 13:14:34 -0500 |
|---|---|---|
| committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2017-07-05 14:43:49 +0000 |
| commit | a473b5a6eb269cc303ecfb5e5643d891a5d255d9 (patch) | |
| tree | 4fde47e5c62c566f81d13f6e90ad98cca781ff6e /src/cpu/o3/rename.hh | |
| parent | 43d833246fcfe092a0c08dde1fdf7e3d409d1af9 (diff) | |
| download | gem5-a473b5a6eb269cc303ecfb5e5643d891a5d255d9.tar.xz | |
cpu: Simplify the rename interface and use RegId
With the hierarchical RegId there are a lot of functions that are
redundant now.
The idea behind the simplification is that instead of having the regId,
telling which kind of register read/write/rename/lookup/etc. and then
the function panic_if'ing if the regId is not of the appropriate type,
we provide an interface that decides what kind of register to read
depending on the register type of the given regId.
Change-Id: I7d52e9e21fc01205ae365d86921a4ceb67a57178
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
[ Fix RISCV build issues ]
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2702
Diffstat (limited to 'src/cpu/o3/rename.hh')
| -rw-r--r-- | src/cpu/o3/rename.hh | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/o3/rename.hh b/src/cpu/o3/rename.hh index ab7ae5f8b..6d3861ba6 100644 --- a/src/cpu/o3/rename.hh +++ b/src/cpu/o3/rename.hh @@ -298,7 +298,7 @@ class DefaultRename * register for that arch. register, and the new physical register. */ struct RenameHistory { - RenameHistory(InstSeqNum _instSeqNum, RegId _archReg, + RenameHistory(InstSeqNum _instSeqNum, const RegId& _archReg, PhysRegIdPtr _newPhysReg, PhysRegIdPtr _prevPhysReg) : instSeqNum(_instSeqNum), archReg(_archReg), |