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author | Iru Cai <mytbk920423@gmail.com> | 2019-02-28 17:07:16 +0800 |
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committer | Iru Cai <mytbk920423@gmail.com> | 2019-03-20 16:08:09 +0800 |
commit | 0ca254aa8381ba2fae61a4a056301e35da9ffab3 (patch) | |
tree | 612664055ade4cca58186a76fee4dd7522aeb305 /src/cpu/o3/rename_impl.hh | |
parent | 476fd104a80095207eec0b594baa642937fbac01 (diff) | |
download | gem5-0ca254aa8381ba2fae61a4a056301e35da9ffab3.tar.xz |
invisispec-1.0 source
Diffstat (limited to 'src/cpu/o3/rename_impl.hh')
-rw-r--r-- | src/cpu/o3/rename_impl.hh | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/cpu/o3/rename_impl.hh b/src/cpu/o3/rename_impl.hh index bc024f603..2720ab914 100644 --- a/src/cpu/o3/rename_impl.hh +++ b/src/cpu/o3/rename_impl.hh @@ -1370,7 +1370,8 @@ DefaultRename<Impl>::serializeAfter(InstQueue &inst_list, ThreadID tid) // Mark a bit to say that I must serialize on the next instruction. serializeOnNextInst[tid] = true; return; - } + } + // Set the next instruction as serializing. inst_list.front()->setSerializeBefore(); |